From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3F4CC433FF for ; Sat, 3 Aug 2019 09:12:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C0B012087C for ; Sat, 3 Aug 2019 09:12:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1564823573; bh=898MJseAbFbCgzhbtWdeteGDnAtJpOyDw4CtY+p0YQs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=X3JCGLPYMgkQyiJllJGN6OyN3d4SMuUTKt0CpmI36sriQ6fEozn0daFHgBsBkJU3X roaobCyqihfmFFHyO/tq/HVESOa6itRVdRQ8bAnZWq+FjtNv4VHgJGzXPHPbZDsMaL gzGmZwsHrDw/Pg6ew+m3v90+jWfhKLt0aiunoRTI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388034AbfHCJMx (ORCPT ); Sat, 3 Aug 2019 05:12:53 -0400 Received: from foss.arm.com ([217.140.110.172]:59726 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387945AbfHCJMx (ORCPT ); Sat, 3 Aug 2019 05:12:53 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BCF71344; Sat, 3 Aug 2019 02:12:52 -0700 (PDT) Received: from big-swifty.misterjones.org (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 41F533F694; Sat, 3 Aug 2019 02:12:48 -0700 (PDT) Date: Sat, 03 Aug 2019 10:12:49 +0100 Message-ID: <86o916mx2m.wl-maz@kernel.org> From: Marc Zyngier To: Martin Blumenstingl Cc: tglx@linutronix.de, jason@lakedaemon.net, ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org, robh+dt@kernel.org, linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com, john@phrozen.org, Hauke Mehrtens Subject: Re: [PATCH 3/5] MIPS: lantiq: add an irq_domain and irq_chip for EBU In-Reply-To: References: <20190727175315.28834-1-martin.blumenstingl@googlemail.com> <20190727175315.28834-4-martin.blumenstingl@googlemail.com> <86y30imq9p.wl-marc.zyngier@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/26 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Organization: Approximate MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Hi Martin, On Thu, 01 Aug 2019 18:42:42 +0100, Martin Blumenstingl wrote: [...] > > > +static void ltq_ebu_irq_handler(struct irq_desc *desc) > > > +{ > > > + struct irq_domain *domain = irq_desc_get_handler_data(desc); > > > + struct irq_chip *irqchip = irq_desc_get_chip(desc); > > > + > > > + chained_irq_enter(irqchip, desc); > > > + > > > + generic_handle_irq(irq_find_mapping(domain, 0)); > > > > Having an irqdomain for a single interrupt is a bit over the top... Is > > that for the convenience of the DT infrastructure? > yes, I did it to get DT support > please let me know if there's a "better" way (preferably with another > driver as example) To be honest, the chained handler is what troubles me the most. You normally would use such a construct if you had a multiplexer. In your case, you have a 1:1 relationship between input and output. It is just that this irqchip allows the trigger to be adapted, which normally calls for a hierarchical implementation. In your case, with only a single interrupt, it doesn't matter much though. > > [...] > > > + irq_create_mapping(domain, 0); > > > > Why do you need to perform this eagerly? I'd expect this interrupt to > > be mapped when it is actually claimed by a driver. > I don't remember why I added it, it may be left-over from copying from > another driver > in v2 I'll try to drop it > > > > + > > > + irq_set_chained_handler_and_data(irq, ltq_ebu_irq_handler, domain); > > > > And there is no HW initialisation whatsoever? I'd expect, at the very > > least, the sole interrupt to be configured as disabled/masked. > I can add that. is there any "best practice" on what I should > initialize (just disable it or also set a "default" mode like > LEVEL_LOW)? Whichever default state makes sense. What you want to avoid is to boot the kernel with a screaming interrupt because some firmware has left it enabled. Thanks, M. -- Jazz is not dead, it just smells funny.