Re: Changing the treatment of the MIPS HI and LO registers

[Richard Sandiford <rdsandiford@googlemail.com>]

Maxim Kuvyrkov <maxim@codesourcery.com> writes:
> GLIBC contains the following code in stdlib/longlong.h:
> <snip>
> #if defined (__mips__) && W_TYPE_SIZE == 32
> #define umul_ppmm(w1, w0, u, v) \
>    __asm__ ("multu %2,%3"						\
> 	   : "=l" ((USItype) (w0)),					\
> 	     "=h" ((USItype) (w1))					\
> 	   : "d" ((USItype) (u)),					\
> 	     "d" ((USItype) (v)))
> #define UMUL_TIME 10
> #define UDIV_TIME 100
> #endif /* __mips__ */
> </snip>
>
> What would be a correct fix in this case?  Something like this:
> <snip>
> #define umul_ppmm(w1, w0, u, v)					\
>    ({unsigned int __attribute__((mode(DI))) __xx;		\
>      __xx = (unsigned int __attribute__((mode(DI)))) u * v;	\
>      w0 = __xx & ((1 << 32) - 1);				\
>      w1 = __xx >> 32;})
> </snip>
>
> Or is there a better way?

All being well, you should just be able to do the same as I did for
GCC's copy of longlong.h (included in the patch you responded to).

Richard