From: Marc Zyngier <maz@kernel.org>
To: Dragan Mladjenovic <Dragan.Mladjenovic@syrmia.com>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Chao-ying Fu <cfu@wavecomp.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Greg Ungerer <gerg@kernel.org>, Hauke Mehrtens <hauke@hauke-m.de>,
Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org,
Paul Burton <paulburton@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Serge Semin <fancer.lancer@gmail.com>,
Thomas Gleixner <tglx@linutronix.de>,
Tiezhu Yang <yangtiezhu@loongson.cn>,
Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
Subject: Re: [PATCH v2 04/12] irqchip: mips-gic: Support multi-cluster in gic_with_each_online_cpu()
Date: Mon, 06 Jun 2022 14:13:16 +0100 [thread overview]
Message-ID: <87tu8y3pg3.wl-maz@kernel.org> (raw)
In-Reply-To: <20220525121030.16054-5-Dragan.Mladjenovic@syrmia.com>
On Wed, 25 May 2022 13:10:22 +0100,
Dragan Mladjenovic <Dragan.Mladjenovic@syrmia.com> wrote:
>
> From: Paul Burton <paulburton@kernel.org>
>
> Introduce support for multi-cluster GIC register access in
> __gic_with_next_online_cpu(), and therefore in its user
> gic_with_each_online_cpu(). We access registers in remote clusters using
> the CM's GCR_CL_REDIRECT register, and so here we delegate to
> mips_cm_lock_other() in order to configure this access.
>
> With this done, users of gic_with_each_online_cpu() gain support for
> multi-cluster with no further changes.
>
> Signed-off-by: Paul Burton <paulburton@kernel.org>
> Signed-off-by: Chao-ying Fu <cfu@wavecomp.com>
> Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
>
> diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
> index 4872bebe24cf..89a3c6d04e09 100644
> --- a/drivers/irqchip/irq-mips-gic.c
> +++ b/drivers/irqchip/irq-mips-gic.c
> @@ -69,6 +69,20 @@ static int __gic_with_next_online_cpu(int prev)
> {
> unsigned int cpu;
>
> + /*
> + * Unlock access to the previous CPU's GIC local register block.
> + *
> + * Delegate to the CM locking code in the multi-cluster case, since
> + * other clusters can only be accessed using GCR_CL_REDIRECT.
> + *
> + * In the single cluster case we don't need to do anything; the caller
> + * is responsible for maintaining gic_lock & nothing should be
> + * expecting any particular value of GIC_VL_OTHER so we can leave it
> + * as-is.
> + */
> + if ((prev != -1) && mips_cps_multicluster_cpus())
> + mips_cm_unlock_other();
Huh. It now strikes me that if you exit the gic_with_next_online_cpu()
early (with a 'break;', for example), the state machine breaks as you
won't have performed the unlock...
This definitely needs some documenting, at the very least.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2022-06-06 13:13 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-25 12:10 [PATCH v2 00/12] MIPS: Support I6500 multi-cluster configuration Dragan Mladjenovic
2022-05-25 12:10 ` [PATCH v2 01/12] MIPS: CPS: Add a couple of multi-cluster utility functions Dragan Mladjenovic
2022-05-25 12:10 ` [PATCH v2 02/12] MIPS: GIC: Generate redirect block accessors Dragan Mladjenovic
2022-05-25 18:33 ` Jiaxun Yang
2022-05-25 12:10 ` [PATCH v2 03/12] irqchip: mips-gic: Introduce gic_with_each_online_cpu() Dragan Mladjenovic
2022-06-06 13:05 ` Marc Zyngier
2022-05-25 12:10 ` [PATCH v2 04/12] irqchip: mips-gic: Support multi-cluster in gic_with_each_online_cpu() Dragan Mladjenovic
2022-06-06 13:13 ` Marc Zyngier [this message]
2022-05-25 12:10 ` [PATCH v2 05/12] irqchip: mips-gic: Setup defaults in each cluster Dragan Mladjenovic
2022-05-25 12:10 ` [PATCH v2 06/12] irqchip: mips-gic: Multi-cluster support Dragan Mladjenovic
2022-06-06 11:47 ` Marc Zyngier
2022-06-07 18:23 ` Jiaxun Yang
2022-06-08 6:05 ` Marc Zyngier
2022-06-09 10:14 ` Jiaxun Yang
2022-06-09 11:54 ` Marc Zyngier
2022-05-25 12:10 ` [PATCH v2 07/12] clocksource: mips-gic-timer: Always use cluster 0 counter as clocksource Dragan Mladjenovic
2022-06-27 14:17 ` Dragan Mladjenovic
2022-06-27 14:27 ` Marc Zyngier
2022-05-25 12:10 ` [PATCH v2 08/12] clocksource: mips-gic-timer: Enable counter when CPUs start Dragan Mladjenovic
2022-05-25 12:10 ` [PATCH v2 09/12] MIPS: pm-cps: Use per-CPU variables as per-CPU, not per-core Dragan Mladjenovic
2022-05-25 12:10 ` [PATCH v2 10/12] MIPS: CPS: Introduce struct cluster_boot_config Dragan Mladjenovic
2022-05-25 12:10 ` [PATCH v2 11/12] MIPS: Report cluster in /proc/cpuinfo Dragan Mladjenovic
2022-06-06 13:14 ` Marc Zyngier
2022-06-07 18:27 ` Jiaxun Yang
2022-06-08 6:13 ` Marc Zyngier
2022-05-25 12:10 ` [PATCH v2 12/12] MIPS: CPS: Boot CPUs in secondary clusters Dragan Mladjenovic
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