From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53111C43334 for ; Mon, 6 Jun 2022 13:13:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238545AbiFFNNX (ORCPT ); Mon, 6 Jun 2022 09:13:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238540AbiFFNNW (ORCPT ); Mon, 6 Jun 2022 09:13:22 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B719718B0F; Mon, 6 Jun 2022 06:13:21 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 6AE3AB81812; Mon, 6 Jun 2022 13:13:20 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2862DC3411C; Mon, 6 Jun 2022 13:13:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1654521199; bh=qbO7lBbtmW3Eet7P0hr1OYo1n6g40lpKLJ1V7MD0vxY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=mlzLz+kOsMx/FW6FW7BiEQ7laxoGg0DZj1Std7P3Y3JNYkG0AyRfekSyye8MKjMOs Z3kFBnj4guzB0y+7cYNglF/MvvatjrXIqtljIPTt88RxEdbD5zfh2H+fsgWNTb771I i9s7n138ZFWLn7hDjtDWGCFyZ/fxpXiTodeICQqmIHJQahRQdC6gP5tseboA7LWWs6 HvWqHCoixjs5Fyte09ar+iCmKtvfa+lqskuYj0w8kayv+wKPUahzj2EXzEQUX4hxTD VL1bMev2+bgs0oWpDmEWXHNzmSFiKxreMHxQ3a7zM0HnF4IXXQiTrDPNBRi2L2wgM/ qsFaUxdChEDcQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nyCXk-00FuJV-Pw; Mon, 06 Jun 2022 14:13:16 +0100 Date: Mon, 06 Jun 2022 14:13:16 +0100 Message-ID: <87tu8y3pg3.wl-maz@kernel.org> From: Marc Zyngier To: Dragan Mladjenovic Cc: Thomas Bogendoerfer , Chao-ying Fu , Daniel Lezcano , Geert Uytterhoeven , Greg Ungerer , Hauke Mehrtens , Ilya Lipnitskiy , Jiaxun Yang , linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Paul Burton , Peter Zijlstra , Serge Semin , Thomas Gleixner , Tiezhu Yang , Dragan Mladjenovic Subject: Re: [PATCH v2 04/12] irqchip: mips-gic: Support multi-cluster in gic_with_each_online_cpu() In-Reply-To: <20220525121030.16054-5-Dragan.Mladjenovic@syrmia.com> References: <20220525121030.16054-1-Dragan.Mladjenovic@syrmia.com> <20220525121030.16054-5-Dragan.Mladjenovic@syrmia.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: Dragan.Mladjenovic@syrmia.com, tsbogend@alpha.franken.de, cfu@wavecomp.com, daniel.lezcano@linaro.org, geert@linux-m68k.org, gerg@kernel.org, hauke@hauke-m.de, ilya.lipnitskiy@gmail.com, jiaxun.yang@flygoat.com, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, paulburton@kernel.org, peterz@infradead.org, fancer.lancer@gmail.com, tglx@linutronix.de, yangtiezhu@loongson.cn, dragan.mladjenovic@syrmia.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org On Wed, 25 May 2022 13:10:22 +0100, Dragan Mladjenovic wrote: > > From: Paul Burton > > Introduce support for multi-cluster GIC register access in > __gic_with_next_online_cpu(), and therefore in its user > gic_with_each_online_cpu(). We access registers in remote clusters using > the CM's GCR_CL_REDIRECT register, and so here we delegate to > mips_cm_lock_other() in order to configure this access. > > With this done, users of gic_with_each_online_cpu() gain support for > multi-cluster with no further changes. > > Signed-off-by: Paul Burton > Signed-off-by: Chao-ying Fu > Signed-off-by: Dragan Mladjenovic > > diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c > index 4872bebe24cf..89a3c6d04e09 100644 > --- a/drivers/irqchip/irq-mips-gic.c > +++ b/drivers/irqchip/irq-mips-gic.c > @@ -69,6 +69,20 @@ static int __gic_with_next_online_cpu(int prev) > { > unsigned int cpu; > > + /* > + * Unlock access to the previous CPU's GIC local register block. > + * > + * Delegate to the CM locking code in the multi-cluster case, since > + * other clusters can only be accessed using GCR_CL_REDIRECT. > + * > + * In the single cluster case we don't need to do anything; the caller > + * is responsible for maintaining gic_lock & nothing should be > + * expecting any particular value of GIC_VL_OTHER so we can leave it > + * as-is. > + */ > + if ((prev != -1) && mips_cps_multicluster_cpus()) > + mips_cm_unlock_other(); Huh. It now strikes me that if you exit the gic_with_next_online_cpu() early (with a 'break;', for example), the state machine breaks as you won't have performed the unlock... This definitely needs some documenting, at the very least. M. -- Without deviation from the norm, progress is not possible.