linux-mips.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Thomas Gleixner <tglx@linutronix.de>
To: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Aleksandar Rikalo <arikalo@gmail.com>,
	Chao-ying Fu <cfu@wavecomp.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Greg Ungerer <gerg@kernel.org>, Hauke Mehrtens <hauke@hauke-m.de>,
	Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org,
	Marc Zyngier <maz@kernel.org>,
	Paul Burton <paulburton@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Serge Semin <fancer.lancer@gmail.com>,
	Tiezhu Yang <yangtiezhu@loongson.cn>
Subject: Re: [PATCH v4 03/14] irqchip: mips-gic: Introduce for_each_online_cpu_gic()
Date: Fri, 21 Jun 2024 20:58:41 +0200	[thread overview]
Message-ID: <87v822m8bi.ffs@tglx> (raw)
In-Reply-To: <20240511104341.151550-4-aleksandar.rikalo@syrmia.com>

On Sat, May 11 2024 at 12:43, Aleksandar Rikalo wrote:
> A few pieces of code in the MIPS GIC driver operate on the GIC local
> register block for each online CPU, accessing each via the GIC's
> other/redirect register block. This patch abstracts the process of
> iterating over online CPUs & configuring the other/redirect region to
> access their registers through a new for_each_online_cpu_gic() macro.
>
> This simplifies users of the new macro slightly, and more importantly
> prepares us for handling multi-cluster systems where the register
> configuration will be done via the CM's GCR_CL_REDIRECT register. By
> abstracting all other/redirect block configuration through this macro,
> and the __gic_with_next_online_cpu() function which backs it, users will
> trivially gain support for multi-cluster when it is implemented in
> __gic_with_next_online_cpu().

Can you please rework the change log according to

  https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#changelog

> Signed-off-by: Paul Burton <paulburton@kernel.org>
> Signed-off-by: Chao-ying Fu <cfu@wavecomp.com>
> Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
> Signed-off-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
> ---
>  drivers/irqchip/irq-mips-gic.c | 61 +++++++++++++++++++++++++++++-----
>  1 file changed, 52 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
> index 76253e864f23..9e7182150b5c 100644
> --- a/drivers/irqchip/irq-mips-gic.c
> +++ b/drivers/irqchip/irq-mips-gic.c
> @@ -66,6 +66,52 @@ static struct gic_all_vpes_chip_data {
>  	bool	mask;
>  } gic_all_vpes_chip_data[GIC_NUM_LOCAL_INTRS];
>  
> +static int __gic_with_next_online_cpu(int prev)
> +{
> +	unsigned int cpu;
> +
> +	/* Discover the next online CPU */
> +	cpu = cpumask_next(prev, cpu_online_mask);
> +
> +	/* If there isn't one, we're done */
> +	if (cpu >= nr_cpu_ids)
> +		return cpu;
> +
> +	/*
> +	 * Lock access to the next CPU's GIC local register block.
> +	 *
> +	 * In the single cluster case we simply set GIC_VL_OTHER. The caller
> +	 * holds gic_lock so nothing can clobber the value we write.
> +	 */
> +	write_gic_vl_other(mips_cm_vp_id(cpu));

What unlocks the access? I assume it's magic, but then magic wants to be
documented.

> +
> +	return cpu;
> +}
> +
> +static inline void __lockdep_assert_held(raw_spinlock_t *gic_lock)
> +{
> +	lockdep_assert_held(gic_lock);
> +}

What is exactly the point of this indirection?

> +/**
> + * for_each_online_cpu_gic() - Iterate over online CPUs, access local registers
> + * @cpu: An integer variable to hold the current CPU number
> + * @gic_lock: A pointer to raw spin lock used as a guard
> + *
> + * Iterate over online CPUs & configure the other/redirect register region to
> + * access each CPUs GIC local register block, which can be accessed from the
> + * loop body using read_gic_vo_*() or write_gic_vo_*() accessor functions or
> + * their derivatives.
> + *
> + * The caller must hold gic_lock throughout the loop, such that GIC_VL_OTHER
> + * cannot be clobbered.
> + */
> +#define for_each_online_cpu_gic(cpu, gic_lock)		\
> +	for (__lockdep_assert_held(gic_lock),		\
> +	     (cpu) = __gic_with_next_online_cpu(-1);	\
> +	     (cpu) = __gic_with_next_online_cpu(cpu),	\
> +	     (cpu) < nr_cpu_ids;)

That's broken. It resolves to:

     for (cpu = foo(-1); cpu = foo(cpu), cpu < nr_cpu_ids; )

So on entering the loop:

      cpu = foo(-1);    -> cpu == 0

Now it has to evaluate the loop condition which does:

      cpu = foo(cpu)    -> cpu == 1
      ...

So CPU 0 is skipped unconditionally. No?

Aside of that. Instead of this __lockdep_assert_held() obfuscation you
can simply do:

#define for_each_online_cpu_gic(cpu, gic_lock)		\
	guard(raw_spinlock_irqsave)(gic_lock);		\
	for ((cpu) = __gic_with_next_online_cpu(-1);	\
	     (cpu) < nr_cpu_ids;			\
	     (cpu) = __gic_with_next_online_cpu(cpu);)

which simplifies the callsites even further.

Thanks,

        tglx

  reply	other threads:[~2024-06-21 18:58 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-11 10:43 [PATCH v4 00/14] MIPS: Support I6500 multi-cluster configuration Aleksandar Rikalo
2024-05-11 10:43 ` [PATCH v4 01/14] MIPS: CPS: Add a couple of multi-cluster utility functions Aleksandar Rikalo
2024-07-09  8:50   ` Thomas Bogendoerfer
2024-05-11 10:43 ` [PATCH v4 02/14] MIPS: GIC: Generate redirect block accessors Aleksandar Rikalo
2024-07-09  8:51   ` Thomas Bogendoerfer
2024-05-11 10:43 ` [PATCH v4 03/14] irqchip: mips-gic: Introduce for_each_online_cpu_gic() Aleksandar Rikalo
2024-06-21 18:58   ` Thomas Gleixner [this message]
2024-05-11 10:43 ` [PATCH v4 04/14] irqchip: mips-gic: Support multi-cluster in for_each_online_cpu_gic() Aleksandar Rikalo
2024-06-21 20:21   ` Thomas Gleixner
2024-05-11 10:43 ` [PATCH v4 05/14] irqchip: mips-gic: Setup defaults in each cluster Aleksandar Rikalo
2024-06-21 20:23   ` Thomas Gleixner
2024-05-11 10:43 ` [PATCH v4 06/14] irqchip: mips-gic: Multi-cluster support Aleksandar Rikalo
2024-05-11 10:43 ` [PATCH v4 07/14] clocksource: mips-gic-timer: Always use cluster 0 counter as clocksource Aleksandar Rikalo
2024-07-08 16:36   ` Daniel Lezcano
2024-07-09  1:47     ` Jiaxun Yang
2024-07-09  8:53       ` Thomas Bogendoerfer
2024-07-09 14:44         ` Daniel Lezcano
2024-07-09 14:56           ` Thomas Bogendoerfer
2024-05-11 10:43 ` [PATCH v4 08/14] clocksource: mips-gic-timer: Enable counter when CPUs start Aleksandar Rikalo
2024-05-27 12:31   ` Philippe Mathieu-Daudé
2024-05-11 10:43 ` [PATCH v4 09/14] MIPS: pm-cps: Use per-CPU variables as per-CPU, not per-core Aleksandar Rikalo
2024-05-11 10:43 ` [PATCH v4 10/14] MIPS: CPS: Introduce struct cluster_boot_config Aleksandar Rikalo
2024-05-11 10:43 ` [PATCH v4 11/14] MIPS: CPS: Boot CPUs in secondary clusters Aleksandar Rikalo
2024-05-11 10:43 ` [PATCH v4 12/14] mips: Enable FDC on MIPS R6 platforms Aleksandar Rikalo
2024-05-11 10:43 ` [PATCH v4 13/14] mips: Move FDC driver to a separate directory Aleksandar Rikalo
2024-05-11 10:43 ` [PATCH v4 14/14] mips: FDC driver refactor Aleksandar Rikalo
2024-06-20 17:56 ` [PATCH v4 00/14] MIPS: Support I6500 multi-cluster configuration Thomas Bogendoerfer
2024-06-20 23:05   ` Jiaxun Yang
2024-06-21  8:21     ` Thomas Bogendoerfer
2024-06-21  9:13       ` Serge Semin
2024-06-24  1:28         ` Serge Semin
2024-06-21 11:04       ` Jiaxun Yang
2024-06-24 20:12 ` Serge Semin
2024-06-25  8:22   ` Aleksandar Rikalo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87v822m8bi.ffs@tglx \
    --to=tglx@linutronix.de \
    --cc=aleksandar.rikalo@syrmia.com \
    --cc=arikalo@gmail.com \
    --cc=cfu@wavecomp.com \
    --cc=daniel.lezcano@linaro.org \
    --cc=fancer.lancer@gmail.com \
    --cc=geert@linux-m68k.org \
    --cc=gerg@kernel.org \
    --cc=hauke@hauke-m.de \
    --cc=ilya.lipnitskiy@gmail.com \
    --cc=jiaxun.yang@flygoat.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@vger.kernel.org \
    --cc=maz@kernel.org \
    --cc=paulburton@kernel.org \
    --cc=peterz@infradead.org \
    --cc=tsbogend@alpha.franken.de \
    --cc=yangtiezhu@loongson.cn \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).