messages from 2014-07-11 22:18:22 to 2014-07-17 17:03:35 UTC [more...]
[PATCH v2] mm/highmem: make kmap cache coloring aware
2014-07-17 17:03 UTC
[PATCH] MIPS: O32/32-bit: Fix bug which can cause incorrect system call restarts
2014-07-17 16:50 UTC (4+ messages)
` "
[PATCH] mm/highmem.c: make kmap cache coloring aware
2014-07-17 16:20 UTC
[PATCH v11 0/11] seccomp: add thread sync ability
2014-07-17 15:45 UTC (15+ messages)
` [PATCH v11 01/11] seccomp: create internal mode-setting function
` [PATCH v11 02/11] seccomp: extract check/assign mode helpers
` [PATCH v11 03/11] seccomp: split mode setting routines
` [PATCH v11 04/11] seccomp: add "seccomp" syscall
` [PATCH v11 05/11] ARM: add seccomp syscall
` [PATCH v11 06/11] MIPS: "
` [PATCH v11 07/11] sched: move no_new_privs into new atomic flags
` [PATCH v11 08/11] seccomp: split filter prep from check and apply
` [PATCH v11 09/11] seccomp: introduce writer locking
` [PATCH v11 10/11] seccomp: allow mode setting across threads
` [PATCH v11 11/11] seccomp: implement SECCOMP_FILTER_FLAG_TSYNC
[PATCH 2/3] arch/mips/net/bpf_jit.c: fix failure check
2014-07-17 14:22 UTC (7+ messages)
` [PATCH] "
[PATCH 0/7] Misc GIC fixes
2014-07-17 12:47 UTC (17+ messages)
` [PATCH 1/7] MIPS: GIC: move GIC interrupt bitmap declarations
` [PATCH 2/7] MIPS: GIC: Move GIC_NUM_INTRS into platform irq.h
` [PATCH 3/7] MIPS: GIC: Remove GIC_FLAG_IPI
` [PATCH 4/7] MIPS: GIC: Prevent array overrun
` [PATCH 5/7] MIPS: GIC: Generalise check for pending interrupts
` [PATCH 6/7] MIPS: Malta: Fix dispatching of GIC interrupts
` [PATCH 7/7] MIPS: GIC: Fix GICBIS macro
[PATCH 0/4] mips: Add cma support to mips
2014-07-17 12:31 UTC (27+ messages)
` [PATCH 1/4] asm-generic: Add dma-contiguous.h
` [PATCH 2/4] arm64: use generic dma-contiguous.h
` [PATCH 3/4] x86: "
` [PATCH 4/4] mips: dma: Add cma support
MIPS: GIC: Prevent array overrun
2014-07-17 8:20 UTC
[PATCH 0/7] Two-phase seccomp and x86 tracing changes
2014-07-16 22:06 UTC (30+ messages)
` [PATCH 1/7] seccomp,x86,arm,mips,s390: Remove nr parameter from secure_computing
` [PATCH 2/7] seccomp: Refactor the filter callback and the API
` [PATCH 3/7] seccomp: Allow arch code to provide seccomp_data
` [PATCH 4/7] x86,x32,audit: Fix x32's AUDIT_ARCH wrt audit
` [PATCH 5/7] x86: Split syscall_trace_enter into two phases
` [PATCH 6/7] x86_64,entry: Treat regs->ax the same in fastpath and slowpath syscalls
` [PATCH 7/7] x86_64,entry: Use split-phase syscall_trace_enter for 64-bit syscalls
[PATCH v10 0/11] seccomp: add thread sync ability
2014-07-16 21:27 UTC (21+ messages)
[PATCH] MIPS: smartmips: Disable assembler warnings
2014-07-16 13:46 UTC (2+ messages)
[PATCH] MIPS: kernel: cps-vec: Set ISA level to mips32r2 for the MIPS MT ASE
2014-07-16 7:53 UTC (2+ messages)
[PATCH 0/3] Use dedicated RI/XI exceptions for MIPSR5 cores
2014-07-16 7:45 UTC (14+ messages)
` [PATCH 1/3] MIPS: Add new option for unique RI/XI exceptions
` [PATCH 2/3] MIPS: Use dedicated exception handler if CPU supports "
` [PATCH 3/3] MIPS: kernel: cpu-probe: Detect unique "
MIPS: Remove BUG_ON(!is_fpu_owner()) in do_ade()
2014-07-16 1:19 UTC
[PATCH V2] MIPS: Don't BUG_ON(!is_fpu_owner()) in do_ade()
2014-07-16 1:19 UTC (2+ messages)
[PATCH 3.13 076/198] MIPS: KVM: Allocate at least 16KB for exception handlers
2014-07-15 21:31 UTC (3+ messages)
` [PATCH 3.13 190/198] recordmcount/MIPS: Fix possible incorrect mcount_loc table entries in modules
` [PATCH 3.13 191/198] MIPS: MSC: Prevent out-of-bounds writes to MIPS SC ioremap'd region
[3.13.y.z extended stable] Patch "recordmcount/MIPS: Fix possible incorrect mcount_loc table entries in modules" has been added to staging queue
2014-07-15 21:30 UTC
[3.13.y.z extended stable] Patch "MIPS: MSC: Prevent out-of-bounds writes to MIPS SC ioremap'd region" has been added to staging queue
2014-07-15 21:30 UTC
[3.13.y.z extended stable] Patch "MIPS: KVM: Allocate at least 16KB for exception handlers" has been added to staging queue
2014-07-15 21:29 UTC
[PATCH] mips: fix a warning for virt_to_page
2014-07-14 15:39 UTC (2+ messages)
[PATCH 0/5] Add support for HardWare Table Walker for 32-bit cores
2014-07-14 11:47 UTC (18+ messages)
` [PATCH 1/5] MIPS: cpu-info: Change the cpu options variable to unsigned long long
` [PATCH 2/5] MIPS: cpu: Add new cpu option for HardWare Table Walker
` [PATCH v2 2/5] MIPS: cpu: Add new cpu option for Hardware "
` [PATCH 3/5] MIPS: asm: Add register definitions "
` [PATCH 4/5] MIPS: kernel: cpu-probe: Add support for the HardWare "
` [PATCH v2 "
` [PATCH 5/5] MIPS: mm: Use the HardWare Page Table Walker if the core supports it
` [PATCH v2 5/5] MIPS: mm: Use the Hardware "
[PATCH 0/4] Memory Accessibility Attribute Register (MAAR) support
2014-07-14 11:37 UTC (13+ messages)
` [PATCH 1/4] MIPS: define MAAR register accessors & bits
` [PATCH 2/4] MIPS: detect presence of MAARs
` [PATCH 3/4] MIPS: initialise MAARs
` [PATCH 4/4] MIPS: Malta: "
` [PATCH v2 "
[PATCH] MIPS: Don't BUG_ON(!is_fpu_owner()) in do_ade() when preemptible
2014-07-14 2:22 UTC (7+ messages)
` [PATCH] Not preempt in CP1 exception handling
[PATCH 00/10] MIPS: BCM63XX: add irq affinity support for IPIC
2014-07-12 10:49 UTC (11+ messages)
` [PATCH 01/10] MIPS: BCM63XX: add width to __dispatch_internal
` [PATCH 02/10] MIPS: BCM63XX: move bcm63xx_init_irq down
` [PATCH 03/10] MIPS: BCM63XX: replace irq dispatch code with a generic version
` [PATCH 04/10] MIPS: BCM63XX: append irq line to irq_{stat,mask}*
` [PATCH 05/10] MIPS: BCM63XX: populate irq_{stat,mask}_addr for second cpu
` [PATCH 06/10] MIPS: BCM63XX: add cpu argument to dispatch internal
` [PATCH 07/10] MIPS: BCM63XX: protect irq register accesses
` [PATCH 08/10] MIPS: BCM63XX: wire up the second cpu's irq line
` [PATCH 09/10] MIPS: BCM63XX: use irq_desc as argument for (un)mask
` [PATCH 10/10] MIPS: BCM63XX: allow setting affinity for IPIC
[PATCH RFC v2] MIPS: add support for vmlinux.bin appended DTB
2014-07-12 10:49 UTC
FIX ME in mc146818rtc.h
2014-07-12 6:59 UTC (2+ messages)
[PATCH] MIPS: bugfix: missed cache flush of TLB refill handler
2014-07-11 22:18 UTC (2+ messages)
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