Linux MIPS Architecture development
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 messages from 2014-12-18 15:13:13 to 2014-12-23 16:44:13 UTC [more...]

[PATCH V2 1/2] MIPS: Move device-trees into vendor sub-directories
 2014-12-23 16:43 UTC 

[PATCH 1/2] MIPS: Move device-trees into vendor sub-directories
 2014-12-23 16:41 UTC  (5+ messages)
` [PATCH 2/2] MIPS: Add dtbs_install target

[PATCH 0/3] MIPS: OCTEON: flash: syncronize bootbus access
 2014-12-23 12:27 UTC  (8+ messages)
` [PATCH 1/3] MIPS: OCTEON: Add semaphore to serialize bootbus accesses
` [PATCH 2/3] MIPS: OCTEON: Protect accesses to bootbus flash with octeon_bootbus_sem
` [PATCH 3/3] MIPS: OCTEON: Use device tree to probe for flash chips

[PATCH][RFC] MIPS: BCM47XX: Move NVRAM driver to the drivers/firmware/
 2014-12-22  6:41 UTC  (3+ messages)

[PATCH] MIPS: BMIPS: fix overwriting without setting the bit
 2014-12-22  2:47 UTC  (4+ messages)

[PATCH 1/2] MIPS: Hibernate: flush TLB entries earlier
 2014-12-22  2:30 UTC  (3+ messages)
` [PATCH 2/2] MIPS: Hibernate: Restructure files and functions

[PATCH 00/28] remove .owner for most platform_drivers: the missing bits
 2014-12-21 21:14 UTC  (3+ messages)
` [PATCH 02/28] mips: lantiq: xway: drop owner assignment from platform_drivers
` [PATCH 03/28] mips: pci: "

[PATCH 0/5] MIPS/crypto: MD5 for OCTEON
 2014-12-21 20:54 UTC  (6+ messages)
` [PATCH 1/5] MIPS: OCTEON: add crypto helper functions
` [PATCH 2/5] MIPS: OCTEON: crypto: add instruction definitions for MD5
` [PATCH 3/5] MIPS: OCTEON: reintroduce crypto features check
` [PATCH 4/5] MIPS: OCTEON: crypto: add MD5 module
` [PATCH 5/5] crypto: enable OCTEON MD5 module selection

[PATCH] arch: mips: fw: arc: file.c: Remove some unused functions
 2014-12-21 17:16 UTC 

[PATCH V5 00/23] Generic BMIPS kernel
 2014-12-21 10:56 UTC  (7+ messages)
` [PATCH V5 13/23] MIPS: BMIPS: Flush the readahead cache after DMA

[PATCH] MIPS: Hibernate: flush TLB entries earlier
 2014-12-20  1:58 UTC  (4+ messages)

[RFC PATCH v2 0/5] MIPS: Full ISA emulation for FPU emulation of delay slots
 2014-12-20  1:52 UTC  (6+ messages)
` [RFC PATCH v2 1/5] MIPS: Add FPU emulator counter for emulated "
` [RFC PATCH v2 2/5] MIPS: Add FPU emulator counter for non-FPU instructions emulated
` [RFC PATCH v2 3/5] MIPS: Add instruction coding for SYNCI and add trap formats
` [RFC PATCH v2 4/5] MIPS: Add full ISA emulator
` [RFC PATCH v2 5/5] MIPS: Use full instruction emulation for FPU emulator delay slot emulation

[PATCH] MIPS: Fix C0_Pagegrain[IEC] support
 2014-12-20  1:39 UTC  (8+ messages)

[PATCH 0/2] Revert broken C0_Pagegrain[PG_IEC] support
 2014-12-20  1:19 UTC  (15+ messages)
` [PATCH 1/2] Revert "MIPS: Use dedicated exception handler if CPU supports RI/XI exceptions"
` [PATCH 2/2] Revert "MIPS: kernel: cpu-probe: Detect unique "

rfc: remove early_printk from a few arches? (blackfin, m68k, mips)
 2014-12-19 22:49 UTC  (8+ messages)

[PATCH RFC 00/67] Add MIPS R6 support
 2014-12-19 16:38 UTC  (123+ messages)
` [PATCH RFC 01/67] MIPS: Add generic QEMU R6 PRid and cpu type identifiers
` [PATCH RFC 09/67] MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6
` [PATCH RFC 10/67] MIPS: asm: asmmacro: Drop unused 'reg' argument on MIPSR2
` [PATCH RFC 11/67] MIPS: asm: asmmacro: Add MIPS R6 support to the simple EI/DI variants
` [PATCH RFC 12/67] MIPS: asm: asmmacro: Replace add instructions with "addui"
` [PATCH RFC 13/67] MIPS: Use generic checksum functions for MIPS R6
` [PATCH RFC 14/67] MIPS: asm: cpu: Add MIPSR6 ISA definitions
` [PATCH RFC 15/67] MIPS: asm: hazards: Add MIPSR6 definitions
` [PATCH RFC 16/67] MIPS: asm: irqflags: Add MIPS R6 related definitions
` [PATCH RFC 17/67] MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions
` [PATCH RFC 18/67] MIPS: asm: spram: Add MIPS R6 related definitions
` [PATCH RFC 19/67] MIPS: asm: atomic: Update asm and ISA constrains for MIPS R6 support
` [PATCH RFC 20/67] MIPS: asm: cmpxchg: "
` [PATCH RFC 21/67] MIPS: asm: bitops: "
` [PATCH RFC 22/67] MIPS: asm: futex: "
` [PATCH RFC 23/67] MIPS: asm: spinlock: Update asm "
` [PATCH RFC 24/67] MIPS: asm: spinlock: Replace sub instruction with addiu
` [PATCH RFC 25/67] MIPS: kernel: cpu-bugs64: Do not check R6 cores for existing 64-bit bugs
` [PATCH RFC 26/67] MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handler
` [PATCH RFC 27/67] MIPS: kernel: cpu-probe.c: Add support for MIPS R6
` [PATCH RFC 28/67] MIPS: kernel: entry.S: Add MIPS R6 related definitions
` [PATCH RFC 29/67] MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfo
` [PATCH RFC 30/67] MIPS: kernel: traps: Add MIPS R6 related definitions
` [PATCH RFC 31/67] MIPS: kernel: r4k_switch: Add support for MIPS R6
` [PATCH RFC 32/67] MIPS: kernel: r4k_fpu: "
` [PATCH RFC 33/67] MIPS: kernel: genex: Set correct ISA level
` [PATCH RFC 34/67] MIPS: kernel: cps-vec: Replace addi with addiu
` [PATCH RFC 35/67] MIPS: uapi: inst: Add new opcodes for COP2 instructions
` [PATCH RFC 36/67] MIPS: kernel: unaligned: Add support for the MIPS R6
` [PATCH RFC 37/67] MIPS: lib: memcpy: Add MIPS R6 support
` [PATCH RFC 38/67] MIPS: lib: memset: "
` [PATCH RFC 39/67] MIPS: mm: page: "
` [PATCH RFC 40/67] MIPS: mm: tlbex: Add MIPS R6 case for the EHB instruction
` [PATCH RFC 41/67] MIPS: mm: c-r4k: Set the correct ISA level
` [PATCH RFC 42/67] MIPS: kernel: branch: Prepare the JR instruction for emulation on MIPS R6
` [PATCH RFC 43/67] MIPS: kernel: branch: Prevent BLTZL emulation for "
` [PATCH RFC 44/67] MIPS: kernel: branch: Prevent BGEZL "
` [PATCH RFC 45/67] MIPS: kernel: branch: Prevent BLTZAL "
` [PATCH RFC 46/67] MIPS: kernel: branch: Prevent BGEZAL "
` [PATCH RFC 47/67] MIPS: kernel: branch: Prevent BEQL "
` [PATCH RFC 48/67] MIPS: kernel: branch: Prevent BNEL "
` [PATCH RFC 49/67] MIPS: kernel: branch: Prevent BLEZL "
` [PATCH RFC 50/67] MIPS: kernel: branch: Prevent BGTZL "
` [PATCH RFC 51/67] MIPS: uapi: inst: Add new BC1EQZ and BC1NEZ MIPS R6 opcodes
` [PATCH RFC 52/67] MIPS: kernel: branch: Add support for the BC1{EQ,NE}Z FPU branches
` [PATCH RFC 53/67] MIPS: kernel: branch: Add new MIPS R6 B{L,G}ΕZ{AL,}C emulation
` [PATCH RFC 54/67] MIPS: kernel: branch: Add new MIPS R6 B{L,G}TZ{AL,}C emulation
` [PATCH RFC 55/67] MIPS: kernel: branch: Emulate the branch compact (BC) on MIPS R6
` [PATCH RFC 56/67] MIPS: kernel: branch: Emulate the BOVC, BEQC and BEQZALC R6 instructions
` [PATCH RFC 57/67] MIPS: kernel: branch: Emulate the BNVC, BNEC and BNEZLAC "
` [PATCH RFC 58/67] MIPS: kernel: branch: Emulate the BALC R6 instruction
` [PATCH RFC 59/67] MIPS: kernel: branch: Emulate the BEQZC and JIC instructions
` [PATCH RFC 60/67] MIPS: math-emu: cp1emu: Move the fpucondbit struct to a header
` [PATCH RFC 61/67] MIPS: Add LLB bit and related feature for the Config 5 CP0 register
` [PATCH RFC 62/67] MIPS: asm: mipsregs: Add support for the LLADDR register
` [PATCH RFC 63/67] MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6
` [PATCH RFC 64/67] MIPS: Make use of the ERETNC instruction on "
` [PATCH RFC 65/67] MIPS: Malta: malta-int: Set correct asm ISA level
` [PATCH RFC 66/67] MIPS: Malta: Add support for building MIPS R6 kernel
` [PATCH RFC 67/67] MIPS: Add Malta QEMU 32R6 defconfig

[PATCH] MIPS: JZ4740: fixup #include's (sparse)
 2014-12-18 17:22 UTC  (6+ messages)


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