messages from 2015-05-20 12:44:57 to 2015-05-24 15:26:04 UTC [more...]
[PATCH v5 00/37] JZ4780 & CI20 support
2015-05-24 15:11 UTC (48+ messages)
` [PATCH v5 01/37] devicetree/bindings: add Ingenic Semiconductor vendor prefix
` [PATCH v5 02/37] devicetree/bindings: add Qi Hardware "
` [PATCH v5 03/37] MIPS: JZ4740: introduce CONFIG_MACH_INGENIC
` [PATCH v5 04/37] MIPS: ingenic: add newer vendor IDs
` [PATCH v5 05/37] MIPS: JZ4740: require & include DT
` [PATCH v5 06/37] MIPS: irq_cpu: declare irqchip table entry
` [PATCH v5 07/37] MIPS: JZ4740: probe CPU interrupt controller via DT
` [PATCH v5 08/37] MIPS: JZ4740: use generic plat_irq_dispatch
` [PATCH v5 09/37] MIPS: JZ4740: move arch_init_irq out of arch/mips/jz4740/irq.c
` [PATCH v5 10/37] devicetree: document Ingenic SoC interrupt controller binding
` [PATCH v5 11/37] MIPS: JZ4740: probe interrupt controller via DT
` [PATCH v5 12/37] MIPS: JZ4740: parse SoC interrupt controller parent IRQ from DT
` [PATCH v5 13/37] MIPS: JZ4740: register an irq_domain for the interrupt controller
` [PATCH v5 14/37] MIPS: JZ4740: drop intc debugfs code
` [PATCH v5 15/37] MIPS: JZ4740: remove jz_intc_base global
` [PATCH v5 16/37] MIPS: JZ4740: support >32 interrupts
` [PATCH v5 17/37] MIPS: JZ4740: define IRQ numbers based on number of intc IRQs
` [PATCH v5 18/37] MIPS: JZ4740: read intc base address from DT
` [PATCH v5 19/37] MIPS: JZ4740: avoid JZ4740-specific naming
` [PATCH v5 21/37] irqchip: move Ingenic SoC intc driver to drivers/irqchip
` [PATCH v5 22/37] MIPS: JZ4740: call jz4740_clock_init earlier
` [PATCH v5 23/37] MIPS: JZ4740: replace use of jz4740_clock_bdata
` [PATCH v5 25/37] clk: ingenic: add driver for Ingenic SoC CGU clocks
[PATCH v4 00/37] JZ4780 & CI20 support
2015-05-24 15:02 UTC (13+ messages)
` [PATCH v4 25/37] clk: ingenic: add driver for Ingenic SoC CGU clocks
` [PATCH v4 26/37] MIPS,clk: migrate JZ4740 to common clock framework
` [PATCH v4 28/37] MIPS,clk: move jz4740 UDC auto suspend functions to jz4740-cgu
` [PATCH v4 28/37] MIPS, clk: "
` [PATCH v4 30/37] clk: ingenic: add JZ4780 CGU support
IP30: SMP, Almost there?
2015-05-24 14:25 UTC (12+ messages)
[PATCH 0/2] MIPS: MSA: bugfixes of context switch
2015-05-23 0:00 UTC (21+ messages)
` [PATCH 1/2] MIPS: MSA: bugfix - disable MSA during thread switch correctly
` [PATCH] MIPS: tidy up FPU context switching
` [PATCH v2] "
` [PATCH 2/2] MIPS: MSA: bugfix of keeping MSA live context through clone or fork
[PATCH 0/7] Clocksource changes for Pistachio CPUFreq
2015-05-22 18:08 UTC (32+ messages)
` [PATCH 1/7] clocksource: mips-gic: Enable the clock before using it
` [PATCH 2/7] clocksource: mips-gic: Add missing error returns checks
` [PATCH 3/7] clocksource: mips-gic: Split clocksource and clockevent initialization
` [PATCH 4/7] clocksource: mips-gic: Update clockevent frequency on clock rate changes
` [PATCH 5/7] clocksource: Add Pistachio SoC general purpose timer binding document
` [PATCH 6/7] clocksource: Add Pistachio clocksource-only driver
` [PATCH 7/7] mips: pistachio: Allow to enable the external timer based clocksource
[PATCH 0/9] clk: pistachio: Assorted changes
2015-05-22 18:07 UTC (31+ messages)
` [PATCH 1/9] clk: pistachio: Add a pll_lock() helper for clarity
` [PATCH 2/9] clk: pistachio: Lock the PLL when enabled upon rate change
` [PATCH 3/9] clk: pistachio: Implement PLL rate adjustment
` [PATCH 4/9] clk: pistachio: Extend DIV_F to pass clk_flags as well
` [PATCH 5/9] clk: pistachio: Add a MUX_F macro to pass clk_flags
` [PATCH 6/9] clk: pistachio: Propagate rate changes in the MIPS PLL clock sub-tree
` [PATCH 7/9] clk: pistachio: Add a rate table for the MIPS PLL
` [PATCH 8/9] clk: pistachio: Add sanity checks on PLL configuration
` [PATCH 9/9] clk: pistachio: Correct critical clock list
[PATCH 00/15] MIPS Malta DT Conversion
2015-05-22 17:27 UTC (33+ messages)
` [PATCH 01/15] MIPS: define GCR_GIC_STATUS register fields
` [PATCH 02/15] MIPS: include errno.h for ENODEV in mips-cm.h
` [PATCH 03/15] MIPS: malta: basic DT plumbing
` [PATCH 04/15] MIPS: i8259: DT support
` [PATCH 05/15] irqchip: mips-gic: register IRQ domain with MIPS_GIC_IRQ_BASE
` [PATCH 06/15] MIPS: malta: probe interrupt controllers via DT
` [PATCH 07/15] MIPS: remove [SR]ocIt(2) IRQ handling code
` [PATCH 08/15] of_serial: support for UARTs on I/O ports
` [PATCH 09/15] MIPS: malta: probe UARTs using DT
` [PATCH 10/15] MIPS: malta: probe RTC via DT
` [PATCH 11/15] MIPS: malta: probe pflash "
` [PATCH 12/15] MIPS: malta: remove fw_memblock_t abstraction
` [PATCH 13/15] MIPS: malta: remove nonsense memory limit
` [PATCH 14/15] MIPS: malta: setup RAM regions via DT
` [PATCH 15/15] MIPS: malta: setup post-I/O hole RAM on non-EVA
[PATCH 6/6] brcmfmac: Add support for host platform NVRAM loading
2015-05-22 9:20 UTC (13+ messages)
[PATCH] mips: irq: Use DECLARE_BITMAP
2015-05-21 16:10 UTC (3+ messages)
[PATCH V2] mips: bcm47xx: allow retrieval of complete nvram contents
2015-05-21 13:27 UTC (2+ messages)
[Patch v2 08/14] genirq: Introduce helper function irq_data_get_affinity_mask()
2015-05-20 19:34 UTC (3+ messages)
[PATCH v3] clk: change clk_ops' ->determine_rate() prototype
2015-05-20 16:12 UTC
[PATCH RESEND] mips: bcm47xx: allow retrieval of complete nvram contents
2015-05-20 14:17 UTC (5+ messages)
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