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References: <20220128230922.2047140-1-j.neuschaefer@gmx.net> <20220128230922.2047140-3-j.neuschaefer@gmx.net>
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From:   =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= <f4bug@amsat.org>
Date:   Tue, 1 Feb 2022 14:57:03 +0100
Message-ID: <CAAdtpL5xVjiKSFVcdFiMQHrki2bDSbDppP65QDC5ybBp3u-kMw@mail.gmail.com>
Subject: Re: [PATCH 2/4] clk: loongson1: Terminate clk_div_table with sentinel element
To:     =?UTF-8?Q?Jonathan_Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>
Cc:     linux-clk <linux-clk@vger.kernel.org>,
        open list <linux-kernel@vger.kernel.org>,
        Keguang Zhang <keguang.zhang@gmail.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        "open list:BROADCOM NVRAM DRIVER" <linux-mips@vger.kernel.org>
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On Mon, Jan 31, 2022 at 12:48 PM Jonathan Neuschäfer
<j.neuschaefer@gmx.net> wrote:
>
> In order that the end of a clk_div_table can be detected, it must be
> terminated with a sentinel element (.div = 0).
>
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
> ---
>  drivers/clk/loongson1/clk-loongson1c.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/loongson1/clk-loongson1c.c b/drivers/clk/loongson1/clk-loongson1c.c
> index 703f87622cf5f..6b29ae9ede3e5 100644
> --- a/drivers/clk/loongson1/clk-loongson1c.c
> +++ b/drivers/clk/loongson1/clk-loongson1c.c
> @@ -37,6 +37,7 @@ static const struct clk_div_table ahb_div_table[] = {
>         [1] = { .val = 1, .div = 4 },
>         [2] = { .val = 2, .div = 3 },
>         [3] = { .val = 3, .div = 3 },
> +       [4] = { .val = 0, .div = 0 },

Easier to review when self-explicit:

        [4] = { /* sentinel */ }

Preferably updated:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

And eventually:
Fixes: b4626a7f4892 ("CLK: Add Loongson1C clock support")

>  };
>
>  void __init ls1x_clk_init(void)
> --
> 2.34.1
>