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[92.40.203.36]) by smtp.gmail.com with ESMTPSA id gi5-20020a1709070c8500b006feb8cebbbfsm7904125ejc.6.2022.06.07.10.00.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jun 2022 10:00:01 -0700 (PDT) References: <20220607110525.36922-1-aidanmacdonald.0x0@gmail.com> From: Aidan MacDonald To: Paul Cercueil Cc: linus.walleij@linaro.org, linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] pinctrl: ingenic: Convert to immutable irq chip Date: Tue, 07 Jun 2022 17:47:19 +0100 In-reply-to: Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Paul Cercueil writes: > Hi Aidan, > > Le mar., juin 7 2022 at 12:05:25 +0100, Aidan MacDonald > a =C3=A9crit : >> Update the driver to use an immutable IRQ chip to fix this warning: >> "not an immutable chip, please consider fixing it!" >> Signed-off-by: Aidan MacDonald >> --- >> drivers/pinctrl/pinctrl-ingenic.c | 33 ++++++++++++++++++------------- >> 1 file changed, 19 insertions(+), 14 deletions(-) >> diff --git a/drivers/pinctrl/pinctrl-ingenic.c >> b/drivers/pinctrl/pinctrl-ingenic.c >> index 1ca11616db74..37258fb05be3 100644 >> --- a/drivers/pinctrl/pinctrl-ingenic.c >> +++ b/drivers/pinctrl/pinctrl-ingenic.c >> @@ -135,7 +135,6 @@ struct ingenic_pinctrl { >> struct ingenic_gpio_chip { >> struct ingenic_pinctrl *jzpc; >> struct gpio_chip gc; >> - struct irq_chip irq_chip; >> unsigned int irq, reg_base; >> }; >> @@ -3419,6 +3418,8 @@ static void ingenic_gpio_irq_enable(struct irq_data >> *irqd) >> struct ingenic_gpio_chip *jzgc =3D gpiochip_get_data(gc); >> int irq =3D irqd->hwirq; >> + gpiochip_enable_irq(gc, irq); >> + >> if (is_soc_or_above(jzgc->jzpc, ID_JZ4770)) >> ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_INT, irq, true); >> else if (is_soc_or_above(jzgc->jzpc, ID_JZ4740)) >> @@ -3443,6 +3444,8 @@ static void ingenic_gpio_irq_disable(struct irq_da= ta >> *irqd) >> ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, false); >> else >> ingenic_gpio_set_bit(jzgc, JZ4730_GPIO_GPIER, irq, false); >> + >> + gpiochip_disable_irq(gc, irq); >> } >> static void ingenic_gpio_irq_ack(struct irq_data *irqd) >> @@ -3684,6 +3687,20 @@ static void ingenic_gpio_irq_release(struct irq_d= ata >> *data) >> return gpiochip_relres_irq(gpio_chip, data->hwirq); >> } >> +static const struct irq_chip ingenic_gpio_irqchip =3D { >> + .name =3D "gpio", >> + .irq_enable =3D ingenic_gpio_irq_enable, >> + .irq_disable =3D ingenic_gpio_irq_disable, >> + .irq_unmask =3D ingenic_gpio_irq_unmask, >> + .irq_mask =3D ingenic_gpio_irq_mask, >> + .irq_ack =3D ingenic_gpio_irq_ack, >> + .irq_set_type =3D ingenic_gpio_irq_set_type, >> + .irq_set_wake =3D ingenic_gpio_irq_set_wake, >> + .irq_request_resources =3D ingenic_gpio_irq_request, >> + .irq_release_resources =3D ingenic_gpio_irq_release, >> + .flags =3D IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, >> +}; >> + >> static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc, >> int pin, int func) >> { >> @@ -4172,20 +4189,8 @@ static int __init ingenic_gpio_probe(struct >> ingenic_pinctrl *jzpc, >> if (!jzgc->irq) >> return -EINVAL; >> - jzgc->irq_chip.name =3D jzgc->gc.label; >> - jzgc->irq_chip.irq_enable =3D ingenic_gpio_irq_enable; >> - jzgc->irq_chip.irq_disable =3D ingenic_gpio_irq_disable; >> - jzgc->irq_chip.irq_unmask =3D ingenic_gpio_irq_unmask; >> - jzgc->irq_chip.irq_mask =3D ingenic_gpio_irq_mask; >> - jzgc->irq_chip.irq_ack =3D ingenic_gpio_irq_ack; >> - jzgc->irq_chip.irq_set_type =3D ingenic_gpio_irq_set_type; >> - jzgc->irq_chip.irq_set_wake =3D ingenic_gpio_irq_set_wake; >> - jzgc->irq_chip.irq_request_resources =3D ingenic_gpio_irq_request; >> - jzgc->irq_chip.irq_release_resources =3D ingenic_gpio_irq_release; >> - jzgc->irq_chip.flags =3D IRQCHIP_MASK_ON_SUSPEND; >> - >> girq =3D &jzgc->gc.irq; >> - girq->chip =3D &jzgc->irq_chip; >> + gpio_irq_chip_set_chip(girq, &ingenic_gpio_irqchip); > > This will change each irq_chip's name to "gpio", do we want that? > > You didn't remove jzgc->irq_chip, so maybe what you could do is > jzgc->irq_chip =3D ingenic_gpio_irqchip; > jzgc->irq_chip.name =3D jzgc->gc.label; > gpio_irq_chip_set_chip(girq, &jzgc->irq_chip); > > Thoughts? > > Cheers, > -Paul > I wondered that myself, but it doesn't seem to affect anything except what is displayed in /proc/interrupts. Is the name used anywhere else where it might cause confusion? The only similar case I could find was pinctrl-microchip-sgpio.c where microchip_sgpio_register_bank() is called in a loop and registers the same irq chip repeatedly, so it's probably(?) okay to do this here. It seems to defeat the point of immutable irqchips if they just have to be copied anyway... (btw, I did remove jzgc->irq_chip -- or did I miss something?) Best regards, Aidan >> girq->parent_handler =3D ingenic_gpio_irq_handler; >> girq->num_parents =3D 1; >> girq->parents =3D devm_kcalloc(dev, 1, sizeof(*girq->parents), >> -- >> 2.35.1 >>=20