From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B6A6C433DB for ; Mon, 8 Mar 2021 16:38:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 594D46522E for ; Mon, 8 Mar 2021 16:38:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230165AbhCHQhg (ORCPT ); Mon, 8 Mar 2021 11:37:36 -0500 Received: from mail.kernel.org ([198.145.29.99]:49022 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229893AbhCHQhc (ORCPT ); Mon, 8 Mar 2021 11:37:32 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id D86E16522B; Mon, 8 Mar 2021 16:37:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1615221451; bh=kJCunVGM1TBj1N64Q0ZF1IN7cKIi5a8hQqvKg2XDJb8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=fK0mveEwkgVSvMug0eRJCXShqkJXO9pv7KJUz9MKdHs/E98UiQT57yHC9OCalX+t2 bRWdQf2HLWuvWb1pvGJq92HBLpflc+As8Pn07/1mnrvmC/GrbsdmkV3+BvVB8yCDll Y/B68UkgObRuQA9dp79cVFo1JTIWBwV53DkbsCJHsQ4mw3bqidCFPjAcVSpwy198f9 K1sRv3X/oB2yEttRa7GBKJQX0HXw4UmNuURizJosg/KPUey5kTIWiWHbIfmEDezbwt ZMGwMqywByeoBlf+WkpheVl6wE0moJuMEh60/wN+5HNGbtfEYk2s/3R7tzeuSHnCXX Ub6XDHzEA8hkg== Date: Mon, 8 Mar 2021 18:37:25 +0200 From: Mike Rapoport To: Thomas Bogendoerfer Cc: Roman Gushchin , Andrew Morton , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Kamal Dasu , Serge Semin Subject: Re: [PATCH v3] MIPS: kernel: Reserve exception base early to prevent corruption Message-ID: References: <20210308092447.13073-1-tsbogend@alpha.franken.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210308092447.13073-1-tsbogend@alpha.franken.de> Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org On Mon, Mar 08, 2021 at 10:24:47AM +0100, Thomas Bogendoerfer wrote: > BMIPS is one of the few platforms that do change the exception base. > After commit 2dcb39645441 ("memblock: do not start bottom-up allocations > with kernel_end") we started seeing BMIPS boards fail to boot with the > built-in FDT being corrupted. > > Before the cited commit, early allocations would be in the [kernel_end, > RAM_END] range, but after commit they would be within [RAM_START + > PAGE_SIZE, RAM_END]. > > The custom exception base handler that is installed by > bmips_ebase_setup() done for BMIPS5000 CPUs ends-up trampling on the > memory region allocated by unflatten_and_copy_device_tree() thus > corrupting the FDT used by the kernel. > > To fix this, we need to perform an early reservation of the custom > exception space. Additional we reserve the first 4k (1k for R3k) for > either normal exception vector space (legacy CPUs) or special vectors > like cache exceptions. Just a side note, memblock always skips the first 4k when allocating memory, but explicitly reserving the exception space is The Right Thing To Do anyway :) > Huge thanks to Serge for analysing and proposing a solution to this > issue. > > Fixes: 2dcb39645441 ("memblock: do not start bottom-up allocations with kernel_end") > Reported-by: Kamal Dasu > Debugged-by: Serge Semin > Signed-off-by: Thomas Bogendoerfer Acked-by: Mike Rapoport > --- > Changes in v3: > - always reserve the first 4k for all CPUs (1k for R3k) > > Changes in v2: > - do only memblock reservation in reserve_exception_space() > - reserve 0..0x400 for all CPUs without ebase register and > to addtional reserve_exception_space for BMIPS CPUs > > arch/mips/include/asm/traps.h | 3 +++ > arch/mips/kernel/cpu-probe.c | 6 ++++++ > arch/mips/kernel/cpu-r3k-probe.c | 3 +++ > arch/mips/kernel/traps.c | 10 +++++----- > 4 files changed, 17 insertions(+), 5 deletions(-) > > diff --git a/arch/mips/include/asm/traps.h b/arch/mips/include/asm/traps.h > index 6aa8f126a43d..b710e76c9c65 100644 > --- a/arch/mips/include/asm/traps.h > +++ b/arch/mips/include/asm/traps.h > @@ -24,8 +24,11 @@ extern void (*board_ebase_setup)(void); > extern void (*board_cache_error_setup)(void); > > extern int register_nmi_notifier(struct notifier_block *nb); > +extern void reserve_exception_space(phys_addr_t addr, unsigned long size); > extern char except_vec_nmi[]; > > +#define VECTORSPACING 0x100 /* for EI/VI mode */ > + > #define nmi_notifier(fn, pri) \ > ({ \ > static struct notifier_block fn##_nb = { \ > diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c > index 9a89637b4ecf..b71892064f27 100644 > --- a/arch/mips/kernel/cpu-probe.c > +++ b/arch/mips/kernel/cpu-probe.c > @@ -26,6 +26,7 @@ > #include > #include > #include > +#include > #include > > #include "fpu-probe.h" > @@ -1628,6 +1629,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) > c->cputype = CPU_BMIPS3300; > __cpu_name[cpu] = "Broadcom BMIPS3300"; > set_elf_platform(cpu, "bmips3300"); > + reserve_exception_space(0x400, VECTORSPACING * 64); > break; > case PRID_IMP_BMIPS43XX: { > int rev = c->processor_id & PRID_REV_MASK; > @@ -1638,6 +1640,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) > __cpu_name[cpu] = "Broadcom BMIPS4380"; > set_elf_platform(cpu, "bmips4380"); > c->options |= MIPS_CPU_RIXI; > + reserve_exception_space(0x400, VECTORSPACING * 64); > } else { > c->cputype = CPU_BMIPS4350; > __cpu_name[cpu] = "Broadcom BMIPS4350"; > @@ -1654,6 +1657,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) > __cpu_name[cpu] = "Broadcom BMIPS5000"; > set_elf_platform(cpu, "bmips5000"); > c->options |= MIPS_CPU_ULRI | MIPS_CPU_RIXI; > + reserve_exception_space(0x1000, VECTORSPACING * 64); > break; > } > } > @@ -2133,6 +2137,8 @@ void cpu_probe(void) > if (cpu == 0) > __ua_limit = ~((1ull << cpu_vmbits) - 1); > #endif > + > + reserve_exception_space(0, 0x1000); > } > > void cpu_report(void) > diff --git a/arch/mips/kernel/cpu-r3k-probe.c b/arch/mips/kernel/cpu-r3k-probe.c > index abdbbe8c5a43..af654771918c 100644 > --- a/arch/mips/kernel/cpu-r3k-probe.c > +++ b/arch/mips/kernel/cpu-r3k-probe.c > @@ -21,6 +21,7 @@ > #include > #include > #include > +#include > > #include "fpu-probe.h" > > @@ -158,6 +159,8 @@ void cpu_probe(void) > cpu_set_fpu_opts(c); > else > cpu_set_nofpu_opts(c); > + > + reserve_exception_space(0, 0x400); > } > > void cpu_report(void) > diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c > index e0352958e2f7..808b8b61ded1 100644 > --- a/arch/mips/kernel/traps.c > +++ b/arch/mips/kernel/traps.c > @@ -2009,13 +2009,16 @@ void __noreturn nmi_exception_handler(struct pt_regs *regs) > nmi_exit(); > } > > -#define VECTORSPACING 0x100 /* for EI/VI mode */ > - > unsigned long ebase; > EXPORT_SYMBOL_GPL(ebase); > unsigned long exception_handlers[32]; > unsigned long vi_handlers[64]; > > +void reserve_exception_space(phys_addr_t addr, unsigned long size) > +{ > + memblock_reserve(addr, size); > +} > + > void __init *set_except_vector(int n, void *addr) > { > unsigned long handler = (unsigned long) addr; > @@ -2367,10 +2370,7 @@ void __init trap_init(void) > > if (!cpu_has_mips_r2_r6) { > ebase = CAC_BASE; > - ebase_pa = virt_to_phys((void *)ebase); > vec_size = 0x400; > - > - memblock_reserve(ebase_pa, vec_size); > } else { > if (cpu_has_veic || cpu_has_vint) > vec_size = 0x200 + VECTORSPACING*64; > -- > 2.29.2 > -- Sincerely yours, Mike.