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[2003:e4:1f0a:6900::43a]) by smtp.gmail.com with ESMTPSA id x12sm1364228edv.57.2022.02.24.05.40.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 05:40:53 -0800 (PST) Date: Thu, 24 Feb 2022 14:40:51 +0100 From: Thierry Reding To: Paul Cercueil , Aidan MacDonald Cc: robh+dt@kernel.org, linux-mips@vger.kernel.org, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] pwm: jz4740: Add support for X1000 SoC Message-ID: References: <20220209231141.20184-1-aidanmacdonald.0x0@gmail.com> <20220209231141.20184-2-aidanmacdonald.0x0@gmail.com> <2SMA7R.9OBQWV0ONR102@crapouillou.net> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="KE21u3QmCih2Rfpn" Content-Disposition: inline In-Reply-To: <2SMA7R.9OBQWV0ONR102@crapouillou.net> User-Agent: Mutt/2.2.1 (c8109e14) (2022-02-19) Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org --KE21u3QmCih2Rfpn Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Feb 14, 2022 at 12:02:26PM +0000, Paul Cercueil wrote: > Hi Aidan, >=20 > Le mer., f=C3=A9vr. 9 2022 at 23:11:42 +0000, Aidan MacDonald > a =C3=A9crit : > > The X1000 has the same TCU / PWM hardware as other Ingenic SoCs, > > but it has only 5 channels. > >=20 > > Signed-off-by: Aidan MacDonald > > --- > > arch/mips/boot/dts/ingenic/x1000.dtsi | 13 +++++++++++++ > > drivers/pwm/pwm-jz4740.c | 5 +++++ >=20 > Please put the driver and device tree changes into separate patches. Seemed a shame not to take this, so I've manually removed the DTS changes and applied this to the PWM tree. Aidan, probably best to resend the DTS snippet as a separate patch, unless Paul also wants to apply this manually. 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