[PATCH v3 0/3] Extend devicetree coverage of MT7621's UART interfaces

[PATCH v3 0/3] Extend devicetree coverage of MT7621's UART interfaces

[Justin Swartz]

This patchset associates the uart1_pins group with serial0 and adds
two nodes, serial1 and serial2, that define the interface to the
MT7621's UART2 and UART3 respectively. 

Changes in v3:
  Added spacing between properties as requested by Arınç ÜNAL.

Changes in v2:
  Reordered properties as requested by Sergio Paracuellos.

Justin Swartz (3):
  mips: dts: ralink: mt7621: associate uart1_pins with serial0
  mips: dts: ralink: mt7621: reorder serial0 properties
  mips: dts: ralink: mt7621: add serial1 and serial2 nodes

 arch/mips/boot/dts/ralink/mt7621.dtsi | 44 +++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

-- 

[PATCH v3 1/3] mips: dts: ralink: mt7621: associate uart1_pins with serial0

[Justin Swartz]

Add missing pinctrl-name and pinctrl-0 properties to declare
that the uart1_pins group is associated with serial0.

Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
---
 arch/mips/boot/dts/ralink/mt7621.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 35a10258f..dca415fdd 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -123,6 +123,9 @@ serial0: serial@c00 {
 			reg-shift = <2>;
 			reg-io-width = <4>;
 			no-loopback-test;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart1_pins>;
 		};
 
 		spi0: spi@b00 {
-- 

[PATCH v3 2/3] mips: dts: ralink: mt7621: reorder serial0 properties

[Justin Swartz]

Reorder serial0 properties according to the guidelines laid
out in Documentation/devicetree/bindings/dts-coding-style.rst

Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
---
 arch/mips/boot/dts/ralink/mt7621.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index dca415fdd..68467fca3 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -115,13 +115,14 @@ serial0: serial@c00 {
 			compatible = "ns16550a";
 			reg = <0xc00 0x100>;
 
+			reg-io-width = <4>;
+			reg-shift = <2>;
+
 			clocks = <&sysc MT7621_CLK_UART1>;
 
 			interrupt-parent = <&gic>;
 			interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
 
-			reg-shift = <2>;
-			reg-io-width = <4>;
 			no-loopback-test;
 
 			pinctrl-names = "default";
-- 

[PATCH v3 3/3] mips: dts: ralink: mt7621: add serial1 and serial2 nodes

[Justin Swartz]

Add serial1 and serial2 nodes to define the existence of
the MT7621's second and third UARTs.

Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
---
 arch/mips/boot/dts/ralink/mt7621.dtsi | 40 +++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 68467fca3..02e1f2491 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -129,6 +129,46 @@ serial0: serial@c00 {
 			pinctrl-0 = <&uart1_pins>;
 		};
 
+		serial1: serial@d00 {
+			compatible = "ns16550a";
+			reg = <0xd00 0x100>;
+
+			reg-io-width = <4>;
+			reg-shift = <2>;
+
+			clocks = <&sysc MT7621_CLK_UART2>;
+
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
+
+			no-loopback-test;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart2_pins>;
+
+			status = "disabled";
+		};
+
+		serial2: serial@e00 {
+			compatible = "ns16550a";
+			reg = <0xe00 0x100>;
+
+			reg-io-width = <4>;
+			reg-shift = <2>;
+
+			clocks = <&sysc MT7621_CLK_UART3>;
+
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>;
+
+			no-loopback-test;
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart3_pins>;
+
+			status = "disabled";
+		};
+
 		spi0: spi@b00 {
 			status = "disabled";
 
-- 

Re: [PATCH v3 1/3] mips: dts: ralink: mt7621: associate uart1_pins with serial0

[Arınç ÜNAL]

On 08/03/2024 18:56, Justin Swartz wrote:
> Add missing pinctrl-name and pinctrl-0 properties to declare
> that the uart1_pins group is associated with serial0.
> 
> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>

Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>

Please add the trailers from previous patch versions from now on.

Arınç

Re: [PATCH v3 2/3] mips: dts: ralink: mt7621: reorder serial0 properties

[Arınç ÜNAL]

On 08/03/2024 18:56, Justin Swartz wrote:
> Reorder serial0 properties according to the guidelines laid
> out in Documentation/devicetree/bindings/dts-coding-style.rst
> 
> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>

Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>

Arınç

Re: [PATCH v3 3/3] mips: dts: ralink: mt7621: add serial1 and serial2 nodes

[Arınç ÜNAL]

On 08/03/2024 18:56, Justin Swartz wrote:
> Add serial1 and serial2 nodes to define the existence of
> the MT7621's second and third UARTs.
> 
> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>

Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>

Arınç

Re: [PATCH v3 1/3] mips: dts: ralink: mt7621: associate uart1_pins with serial0

[Justin Swartz]

On 2024-03-08 18:14, Arınç ÜNAL wrote:
> On 08/03/2024 18:56, Justin Swartz wrote:
>> Add missing pinctrl-name and pinctrl-0 properties to declare
>> that the uart1_pins group is associated with serial0.
>> 
>> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
>> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
> 
> Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> 
> Please add the trailers from previous patch versions from now on.

What do you mean by trailers?

Regards
Justin

Re: [PATCH v3 1/3] mips: dts: ralink: mt7621: associate uart1_pins with serial0

[Krzysztof Kozlowski]

On 08/03/2024 18:01, Justin Swartz wrote:
> On 2024-03-08 18:14, Arınç ÜNAL wrote:
>> On 08/03/2024 18:56, Justin Swartz wrote:
>>> Add missing pinctrl-name and pinctrl-0 properties to declare
>>> that the uart1_pins group is associated with serial0.
>>>
>>> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
>>> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
>>
>> Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>
>>
>> Please add the trailers from previous patch versions from now on.
> 
> What do you mean by trailers?

https://elixir.bootlin.com/linux/v6.5-rc3/source/Documentation/process/submitting-patches.rst#L577

Best regards,
Krzysztof

Re: [PATCH v3 1/3] mips: dts: ralink: mt7621: associate uart1_pins with serial0

[Justin Swartz]

On 2024-03-08 19:13, Krzysztof Kozlowski wrote:
> On 08/03/2024 18:01, Justin Swartz wrote:
>> On 2024-03-08 18:14, Arınç ÜNAL wrote:
>>> On 08/03/2024 18:56, Justin Swartz wrote:
>>>> Add missing pinctrl-name and pinctrl-0 properties to declare
>>>> that the uart1_pins group is associated with serial0.
>>>> 
>>>> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
>>>> Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
>>> 
>>> Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>
>>> 
>>> Please add the trailers from previous patch versions from now on.
>> 
>> What do you mean by trailers?
> 
> https://elixir.bootlin.com/linux/v6.5-rc3/source/Documentation/process/submitting-patches.rst#L577

Thanks, Krzysztof.

I thought I had done this with this patchset on all three patches,
but if I've accidentally left anyone out - sorry about that.

Regards
Justin

Re: [PATCH v3 0/3] Extend devicetree coverage of MT7621's UART interfaces

[Thomas Bogendoerfer]

On Fri, Mar 08, 2024 at 05:56:13PM +0200, Justin Swartz wrote:
> This patchset associates the uart1_pins group with serial0 and adds
> two nodes, serial1 and serial2, that define the interface to the
> MT7621's UART2 and UART3 respectively. 
> 
> Changes in v3:
>   Added spacing between properties as requested by Arınç ÜNAL.
> 
> Changes in v2:
>   Reordered properties as requested by Sergio Paracuellos.
> 
> Justin Swartz (3):
>   mips: dts: ralink: mt7621: associate uart1_pins with serial0
>   mips: dts: ralink: mt7621: reorder serial0 properties
>   mips: dts: ralink: mt7621: add serial1 and serial2 nodes
> 
>  arch/mips/boot/dts/ralink/mt7621.dtsi | 44 +++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)

series applied to mips-next.

Thomas.

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