From: Thomas Zimmermann <tzimmermann@suse.de>
To: Paul Cercueil <paul@crapouillou.net>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: linux-mips@vger.kernel.org, stable@vger.kernel.org,
linux-kernel@vger.kernel.org, od@zcrc.me,
dri-devel@lists.freedesktop.org, Sam Ravnborg <sam@ravnborg.org>
Subject: Re: [PATCH] drm/ingenic: Fix pixclock rate for 24-bit serial panels
Date: Fri, 14 May 2021 19:26:28 +0200 [thread overview]
Message-ID: <a42b2e5d-49e7-a15b-5f5f-9eb858e8fdf6@suse.de> (raw)
In-Reply-To: <6DP1TQ.W6B9JRRW1OY5@crapouillou.net>
[-- Attachment #1.1: Type: text/plain, Size: 2009 bytes --]
Am 13.05.21 um 14:29 schrieb Paul Cercueil:
> Hi,
>
> Almost two months later,
>
>
> Le mar., mars 23 2021 at 14:40:08 +0000, Paul Cercueil
> <paul@crapouillou.net> a écrit :
>> When using a 24-bit panel on a 8-bit serial bus, the pixel clock
>> requested by the panel has to be multiplied by 3, since the subpixels
>> are shifted sequentially.
>>
>> The code (in ingenic_drm_encoder_atomic_check) already computed
>> crtc_state->adjusted_mode->crtc_clock accordingly, but clk_set_rate()
>> used crtc_state->adjusted_mode->clock instead.
>>
>> Fixes: 28ab7d35b6e0 ("drm/ingenic: Properly compute timings when using
>> a 3x8-bit panel")
>> Cc: stable@vger.kernel.org # v5.10
>> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
>
> Can I get an ACK for my patch?
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
>
> Thanks!
> -Paul
>
>> ---
>> drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
>> b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
>> index d60e1eefc9d1..cba68bf52ec5 100644
>> --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
>> +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
>> @@ -342,7 +342,7 @@ static void ingenic_drm_crtc_atomic_flush(struct
>> drm_crtc *crtc,
>> if (priv->update_clk_rate) {
>> mutex_lock(&priv->clk_mutex);
>> clk_set_rate(priv->pix_clk,
>> - crtc_state->adjusted_mode.clock * 1000);
>> + crtc_state->adjusted_mode.crtc_clock * 1000);
>> priv->update_clk_rate
= false;
>> mutex_unlock(&priv->clk_mutex);
>> }
>> --
>> 2.30.2
>>
>
>
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer
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next prev parent reply other threads:[~2021-05-14 17:26 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 14:40 [PATCH] drm/ingenic: Fix pixclock rate for 24-bit serial panels Paul Cercueil
2021-04-12 14:34 ` Paul Cercueil
2021-04-12 14:53 ` H. Nikolaus Schaller
2021-05-13 12:29 ` Paul Cercueil
2021-05-14 17:26 ` Thomas Zimmermann [this message]
2021-05-17 13:15 ` Daniel Vetter
2021-05-17 14:30 ` Paul Cercueil
2021-05-17 14:37 ` Daniel Vetter
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