From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Icenowy Zheng <zhengxingda@iscas.ac.cn>,
Icenowy Zheng <uwu@icenowy.me>, Yao Zi <me@ziyao.cc>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
loongarch@lists.linux.dev,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
Xuerui Wang <kernel@xen0n.name>,
Thomas Gleixner <tglx@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Rob Herring <robh@kernel.org>,
Huacai Chen <chenhuacai@kernel.org>
Subject: Re: [PATCH v4 1/6] MIPS: loongson64: Override arch_dynirq_lower_bound to reserve LPC IRQs
Date: Thu, 26 Mar 2026 23:46:28 +0100 [thread overview]
Message-ID: <acW3RMKjA194cyHm@alpha.franken.de> (raw)
In-Reply-To: <a8cb7352-2d1e-46e9-b526-de4d4dd7b460@app.fastmail.com>
On Thu, Mar 26, 2026 at 09:40:09PM +0000, Jiaxun Yang wrote:
>
>
> On Sat, 21 Mar 2026, at 9:20 AM, Icenowy Zheng wrote:
> > On some Loongson 3A devices, a LPC bus is present and some legacy
> > devices (e.g. 8259) on it expect hardcoded low interrupt numbers. However
> > currently the expected low range interrupt numbers are not exempted from
> > the dynamic allocation, which leads to confliction when registering LPC
> > interrupts in the fixed range.
> >
> > Override arch_dynirq_lower_bound() to reserve these low range interrupt
> > numbers and prevent them from being dynamically allocated.
> >
> > Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
>
> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>
> @Thomas Bogendoerfer, do you mind picking this over MIPS tree?
https://lore.kernel.org/all/177453852024.1647592.16054697624437632741.tip-bot2@tip-bot2/
IMHO this in tip tree already
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
next prev parent reply other threads:[~2026-03-26 22:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-21 9:20 [PATCH v4 0/6] Add support for LS7A LPC IRQ for MIPS Loongson systems Icenowy Zheng
2026-03-21 9:20 ` [PATCH v4 1/6] MIPS: loongson64: Override arch_dynirq_lower_bound to reserve LPC IRQs Icenowy Zheng
2026-03-26 21:40 ` Jiaxun Yang
2026-03-26 22:46 ` Thomas Bogendoerfer [this message]
2026-03-21 9:20 ` [PATCH v4 2/6] LoongArch: " Icenowy Zheng
2026-03-21 9:20 ` [PATCH v4 3/6] dt-bindings: interrupt-controller: add LS7A PCH LPC Icenowy Zheng
2026-03-21 11:45 ` Jiaxun Yang
2026-03-25 16:56 ` Rob Herring (Arm)
2026-03-21 9:20 ` [PATCH v4 4/6] irqchip/loongson-pch-lpc: Extract non-ACPI-related code from ACPI init Icenowy Zheng
2026-03-21 9:20 ` [PATCH v4 5/6] irqchip/loongson-pch-lpc: Add OF init code Icenowy Zheng
2026-03-21 9:20 ` [PATCH v4 6/6] irqchip/loongson-pch-lpc: Enable building on MIPS Loongson64 Icenowy Zheng
2026-03-21 11:46 ` Jiaxun Yang
2026-03-21 12:10 ` [PATCH v4 0/6] Add support for LS7A LPC IRQ for MIPS Loongson systems Huacai Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=acW3RMKjA194cyHm@alpha.franken.de \
--to=tsbogend@alpha.franken.de \
--cc=chenhuacai@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jiaxun.yang@flygoat.com \
--cc=kernel@xen0n.name \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@vger.kernel.org \
--cc=loongarch@lists.linux.dev \
--cc=me@ziyao.cc \
--cc=robh@kernel.org \
--cc=tglx@kernel.org \
--cc=uwu@icenowy.me \
--cc=zhengxingda@iscas.ac.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox