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Date:   Mon, 20 May 2013 19:36:23 +0100 (BST)
From:   "Maciej W. Rozycki" <macro@linux-mips.org>
To:     Sanjay Lal <sanjayl@kymasys.com>
cc:     David Daney <ddaney.cavm@gmail.com>, kvm@vger.kernel.org,
        linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>,
        Gleb Natapov <gleb@redhat.com>,
        Marcelo Tosatti <mtosatti@redhat.com>
Subject: Re: [PATCH 00/18] KVM/MIPS32: Support for the new Virtualization
 ASE (VZ-ASE)
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On Mon, 20 May 2013, Sanjay Lal wrote:

> (1) Newer versions of the MIPS architecture define scratch registers for 
> just this purpose, but since we have to support standard MIPS32R2 
> processors, we use the DDataLo Register (CP0 Register 28, Select 3) as a 
> scratch register to save k0 and save k1 @ a known offset from EBASE.

 That's rather risky as the implementation of this register (and its 
presence in the first place) is processor-specific.  Do you maintain a 
list of PRId values the use of this register is safe with?

  Maciej