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From: Franck <vagabon.xyz@gmail.com>
To: "Kevin D. Kissell" <kevink@mips.com>
Cc: "Maciej W. Rozycki" <macro@linux-mips.org>,
	Ralf Baechle <ralf@linux-mips.org>,
	linux-mips@linux-mips.org
Subject: Re: [PATCH] Add support for 4KS cpu.
Date: Tue, 4 Oct 2005 17:18:26 +0200	[thread overview]
Message-ID: <cda58cb80510040818v6d93fe53w@mail.gmail.com> (raw)
In-Reply-To: <434289A7.50007@mips.com>

2005/10/4, Kevin D. Kissell <kevink@mips.com>:
> >  Well, the patch asked GCC to use the instruction set of the "4kec" CPU
> > for both (and also the "mips32r2" ISA, but that's overridden by the
> > former), so it must have been incorrect in the first place
>
> Which was sort-of why I replied.  In particular, the MIPS32R2 bitfield
> instructions will probably cause a reserved instruction fault on a 4KSc.
>

should I pass these options to GCC for 4KSc ?

cflags-$(CONFIG_CPU_4KSC)      += \
                       $(call set_gccflags,4kc,mips32r1,r4600,mips3,mips2) \
                       -msmartmips -Wa,--trap

Thanks
--
               Franck

  reply	other threads:[~2005-10-04 15:18 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-10-04  8:49 [PATCH] Add support for 4KS cpu Franck
2005-10-04 11:34 ` Maciej W. Rozycki
2005-10-04 12:38   ` Kevin D. Kissell
2005-10-04 13:29     ` Maciej W. Rozycki
2005-10-04 13:54       ` Kevin D. Kissell
2005-10-04 15:18         ` Franck [this message]
2005-10-04 16:01           ` Maciej W. Rozycki
2005-10-04 17:33             ` Franck
2005-10-05  6:55               ` Franck
2005-10-05 13:22                 ` Maciej W. Rozycki
2005-10-05 18:04                   ` Franck
2005-10-05  7:00     ` Franck
2005-10-05  9:46       ` Kevin D. Kissell
2005-10-05 13:20         ` Franck
2005-10-04 13:10   ` Franck
2005-10-04 13:54     ` Maciej W. Rozycki
2005-10-04 15:10       ` Franck
2005-10-04 17:11         ` Maciej W. Rozycki
2005-10-04 14:17     ` Ralf Baechle
2005-10-04 14:06 ` Ralf Baechle

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