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From: Aleksander Jan Bajkowski <olek2@wp.pl>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: benjamin.larsson@genexis.eu, chester.a.unal@arinc9.com,
	davem@davemloft.net, angelogioacchino.delregno@collabora.com,
	ansuelsmth@gmail.com, conor+dt@kernel.org,
	herbert@gondor.apana.org.au, krzk+dt@kernel.org,
	matthias.bgg@gmail.com, robh@kernel.org,
	sergio.paracuellos@gmail.com, tsbogend@alpha.franken.de,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org
Subject: Re: [PATCH v3 1/3] dt-bindings: crypto: eip93: add clock gate and reset line
Date: Sun, 11 Jan 2026 14:36:52 +0100	[thread overview]
Message-ID: <d7ab5be3-8502-407c-baf6-714ac3a89cb7@wp.pl> (raw)
In-Reply-To: <20260103-sweet-micro-manul-12eaee@quoll>

Hi Krzysztof,

On 1/3/26 15:11, Krzysztof Kozlowski wrote:
> On Fri, Jan 02, 2026 at 04:47:33PM +0100, Aleksander Jan Bajkowski wrote:
>> Add the clock gate and reset line, both of which are available
>> on the Airoha AN7581.
>>
>> Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
>> ---
>> v3:
>> - introduce patch
>> ---
>>   .../crypto/inside-secure,safexcel-eip93.yaml       | 14 ++++++++++++++
>>   1 file changed, 14 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml
>> index 997bf9717f9e..c6c99c08dc68 100644
>> --- a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml
>> +++ b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml
>> @@ -48,20 +48,34 @@ properties:
>>     interrupts:
>>       maxItems: 1
>>   
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  resets:
>> +    maxItems: 1
>> +
>>   required:
>>     - compatible
>>     - reg
>>     - interrupts
>> +  - clocks
>> +  - resets
> That's ABI break without explanation in the commit msg.
>
I think that the reset line and clock gate are available on all SoCs
with this IP Core. Should the reset line and clock gate only be
required for newly added SoCs, and remain optional for existing ones?

Best regards,
Aleksander


  reply	other threads:[~2026-01-11 13:37 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-02 15:47 [PATCH v3 1/3] dt-bindings: crypto: eip93: add clock gate and reset line Aleksander Jan Bajkowski
2026-01-02 15:47 ` [PATCH v3 2/3] dt-bindings: crypto: eip93: add support for Mediatek MT7621 SoC Aleksander Jan Bajkowski
2026-01-02 17:38   ` Rob Herring (Arm)
2026-01-02 15:47 ` [PATCH v3 3/3] mips: dts: ralink: mt7621: add crypto offload support Aleksander Jan Bajkowski
2026-01-03 14:11 ` [PATCH v3 1/3] dt-bindings: crypto: eip93: add clock gate and reset line Krzysztof Kozlowski
2026-01-11 13:36   ` Aleksander Jan Bajkowski [this message]
2026-01-12  7:32     ` Krzysztof Kozlowski

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