From: Wang Xuerui <i@xen0n.name>
To: Huacai Chen <chenhc@lemote.com>, WANG Xuerui <git@xen0n.name>
Cc: "open list:MIPS" <linux-mips@vger.kernel.org>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Tiezhu Yang <yangtiezhu@loongson.cn>
Subject: Re: [PATCH 4/4] MIPS: emulate CPUCFG instruction on older Loongson64 cores
Date: Sun, 3 May 2020 15:58:45 +0800 [thread overview]
Message-ID: <da2aa0e8-ee8c-18a1-ee04-b57678ed1bfc@xen0n.name> (raw)
In-Reply-To: <CAAhV-H5U+KHzORKVjrteYggF24WUAz+dsNL_-YJ_0vKvo2Mw1A@mail.gmail.com>
On 5/3/20 2:31 PM, Huacai Chen wrote:
> Hi, Xuerui,
>
> On Sat, May 2, 2020 at 9:47 PM WANG Xuerui <git@xen0n.name> wrote:
>> +
>> +static int simulate_loongson3_csr_cpucfg(struct pt_regs *regs,
>> + unsigned int opcode)
> Maybe simulate_loongson3_cpucfg() is a better name?
Fair point, I was thinking CPUCFG is a part of bigger CSR instructions,
so kept the prefix; I don't know what other CSR instructions are
accessible from user-space anyway. (Loongson, could you guys *please*
release the ISA docs btw?)
Anyway, by removing the "csr" part it feels more consistent with other
parts of the patch. I'll send v2 soon.
next prev parent reply other threads:[~2020-05-03 8:06 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-02 13:38 [PATCH 0/4] CPUCFG emulation on older Loongson64 cores WANG Xuerui
2020-05-02 13:38 ` [PATCH 1/4] MIPS: Loongson64: fix typos in loongson_regs.h WANG Xuerui
2020-05-02 13:38 ` [PATCH 2/4] MIPS: Loongson64: define offsets and known revisions for some CPUCFG features WANG Xuerui
2020-05-02 13:38 ` [PATCH 3/4] MIPS: define more Loongson CP0.Config6 and CP0.Diag feature bits WANG Xuerui
2020-05-02 13:38 ` [PATCH 4/4] MIPS: emulate CPUCFG instruction on older Loongson64 cores WANG Xuerui
2020-05-02 13:59 ` Jiaxun Yang
2020-05-03 6:31 ` Huacai Chen
2020-05-03 7:58 ` Wang Xuerui [this message]
2020-05-03 8:25 ` Jiaxun Yang
2020-05-03 10:33 ` [PATCH v2 0/4] CPUCFG emulation " WANG Xuerui
2020-05-16 11:29 ` WANG Xuerui
2020-05-17 8:38 ` Thomas Bogendoerfer
2020-05-03 10:33 ` [PATCH v2 1/4] MIPS: Loongson64: fix typos in loongson_regs.h WANG Xuerui
2020-05-03 10:33 ` [PATCH v2 2/4] MIPS: Loongson64: define offsets and known revisions for some CPUCFG features WANG Xuerui
2020-05-03 10:33 ` [PATCH v2 3/4] MIPS: define more Loongson CP0.Config6 and CP0.Diag feature bits WANG Xuerui
2020-05-03 10:33 ` [PATCH v2 4/4] MIPS: emulate CPUCFG instruction on older Loongson64 cores WANG Xuerui
2020-05-03 10:50 ` [PATCH v2 RESEND " WANG Xuerui
2020-05-03 15:50 ` Jiaxun Yang
2020-05-04 5:25 ` WANG Xuerui
2020-05-04 6:58 ` Jiaxun Yang
2020-05-17 8:37 ` Thomas Bogendoerfer
2020-05-17 11:39 ` WANG Xuerui
2020-05-17 15:17 ` Thomas Bogendoerfer
2020-05-18 2:44 ` WANG Xuerui
2020-05-19 14:33 ` WANG Xuerui
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