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Fri, 13 Nov 2026 10:43:44 -0800 (PST) Received: from [10.67.48.245] ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ee0fa14f7esm13391505ad.70.2026.11.13.10.43.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Nov 2026 10:43:43 -0800 (PST) Message-ID: Date: Fri, 13 Nov 2026 10:43:42 -0800 X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/4] MIPS: Skip generic IPI setup for platform-specific callbacks To: linux-mips@vger.kernel.org Cc: Thomas Bogendoerfer , Paul Burton , Paul Cercueil , Stephen Boyd , Brian Masney , Jerome Brunet , =?UTF-8?B?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= , Jiaxun Yang , open list , "open list:COMMON CLK FRAMEWORK" , hns@goldelico.com, paul@boddie.org.uk References: <20261113184210.470320-1-f.fainelli@gmail.com> <20261113184210.470320-3-f.fainelli@gmail.com> Content-Language: en-US, fr-FR From: Florian Fainelli In-Reply-To: <20261113184210.470320-3-f.fainelli@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 11/13/26 10:42, Florian Fainelli wrote: > A generic MIPS kernel can select a platform SMP backend with direct IPI > callbacks instead of an IPI IRQ domain. The XBurst backend uses CP0 > mailboxes, so generic IPI allocation would find no domain and BUG when > more than one CPU is present. > > Skip generic IPI initialization when neither selected send callback uses > the generic implementation. Keep initialization when either callback > uses generic IRQ IPIs, and retain the existing single-CPU shortcut. > > Sashiko AI reported the XBurst integration issue; Codex assisted with > the change and extracted-function/build checks. Argh sorry I missed adding my Signed-off-by tag here.. -- Florian