From: "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
To: Boris Brezillon <boris.brezillon@collabora.com>, qi-ming.wu@intel.com
Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
devicetree@vger.kernel.org, cheol.yong.kim@intel.com,
hauke.mehrtens@intel.com, anders.roxell@linaro.org,
vigneshr@ti.com, arnd@arndb.de, richard@nod.at,
brendanhiggins@google.com, linux-mips@vger.kernel.org,
robh+dt@kernel.org, miquel.raynal@bootlin.com,
tglx@linutronix.de, masonccyang@mxic.com.tw,
andriy.shevchenko@intel.com
Subject: Re: [PATCH v4 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
Date: Wed, 29 Apr 2020 23:29:29 +0800 [thread overview]
Message-ID: <f5961645-fe35-7ef5-05ff-c1529c5699a1@linux.intel.com> (raw)
In-Reply-To: <2e83a2f7-853c-f0e2-f686-daf1e0649eae@linux.intel.com>
Hi Boris,
On 29/4/2020 11:18 pm, Ramuthevar, Vadivel MuruganX wrote:
> + writel(lower_32_bits(ebu_host->cs[ebu_host->cs_num].nand_pa) |
> + EBU_ADDR_SEL_REGEN | EBU_ADDR_MASK,
> + ebu_host->ebu + EBU_ADDR_SEL(reg));
> +
> + writel(EBU_MEM_BASE_CS_0 | EBU_ADDR_MASK | EBU_ADDR_SEL_REGEN,
> + ebu_host->ebu + EBU_ADDR_SEL(0));
Good catch!, one will be removed , Thanks !
Regards
Vadivel
next prev parent reply other threads:[~2020-04-29 15:29 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-29 10:42 [PATCH v4 0/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-04-29 10:42 ` [PATCH v4 1/2] dt-bindings: mtd: Add YAML for Nand Flash Controller support Ramuthevar,Vadivel MuruganX
2020-04-29 15:34 ` Boris Brezillon
2020-04-30 1:07 ` Ramuthevar, Vadivel MuruganX
2020-04-29 10:42 ` [PATCH v4 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-04-29 11:33 ` Boris Brezillon
2020-04-29 13:29 ` Ramuthevar, Vadivel MuruganX
2020-04-29 13:32 ` Boris Brezillon
2020-04-29 14:26 ` Ramuthevar, Vadivel MuruganX
2020-04-29 14:22 ` Boris Brezillon
2020-04-29 14:33 ` Ramuthevar, Vadivel MuruganX
2020-04-29 14:48 ` Boris Brezillon
2020-04-29 15:18 ` Ramuthevar, Vadivel MuruganX
2020-04-29 15:29 ` Ramuthevar, Vadivel MuruganX [this message]
2020-04-29 15:31 ` Boris Brezillon
2020-04-30 7:50 ` Ramuthevar, Vadivel MuruganX
2020-04-30 8:21 ` Boris Brezillon
2020-04-30 8:30 ` Ramuthevar, Vadivel MuruganX
2020-04-30 8:36 ` Boris Brezillon
2020-04-30 9:07 ` Ramuthevar, Vadivel MuruganX
2020-04-30 12:36 ` Boris Brezillon
2020-04-30 13:01 ` Boris Brezillon
2020-05-04 1:58 ` Ramuthevar, Vadivel MuruganX
2020-05-04 2:02 ` Ramuthevar, Vadivel MuruganX
2020-05-04 7:08 ` Boris Brezillon
2020-05-04 7:15 ` Ramuthevar, Vadivel MuruganX
2020-05-04 7:17 ` Boris Brezillon
2020-05-04 8:50 ` Ramuthevar, Vadivel MuruganX
2020-05-04 8:58 ` Boris Brezillon
2020-05-04 9:17 ` Ramuthevar, Vadivel MuruganX
2020-05-05 5:28 ` Ramuthevar, Vadivel MuruganX
2020-05-05 7:00 ` Boris Brezillon
2020-05-05 7:17 ` Ramuthevar, Vadivel MuruganX
2020-05-04 1:54 ` Ramuthevar, Vadivel MuruganX
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