Re: Reason for PIO_MASK?

[Manuel Lauss <manuel.lauss@googlemail.com>]

On Tue, Oct 6, 2009 at 1:52 PM, Ralf Baechle <ralf@linux-mips.org> wrote:
> On Sat, Oct 03, 2009 at 04:48:12PM +0200, Manuel Lauss wrote:
>
>> In arch/mips/lib/iomap.c  there's this "#define PIO_MASK 0x0ffff"
>> which limits the ability to successfully call ioport_map() to the
>> first 64kB.  This causes pata_pcmcia to error out on CF card
>> probe because devm_ioport_map() is called with the remapped
>> PCMCIA IO area, which is somewhere in MAP_BASE space.
>
> Remapped, so that then actually be a physical address?  That'd be wrong.

I meant the result of ioremap() of the 36bit address of PCMCIA IO space:
so the ioport base is somewhere at 0xc0000000, which pata_pcmcia
tries to devm_iomap(), and this is rejected by the above mentioned file.

The old ide-cs.c driver takes the given IO base as-is (without trying to
do funky things to it) and just works. (i.e. there are 2 entries in the
0xc0000000-range per cf-card in /proc/ioports)


>> I've temporarily removed the PIO_MASK check and pata_pcmcia
>> works as expected. Is there any way around this, other than
>> creating an Alchemy-specific ioport_map() function?
>
> The provocative question - why would you want to have more than 64k I/O port
> space?

*I* don't want more; I want a smarter pata_pcmcia driver ;-)  I'll go bug other
people about this.  I brought this up here because one of my SH boards has
similar needs (need to do an ioremap() with special TLB flags to get access to
pcmcia IO space) but pata_pcmcia does work there (because SH kernel
either asks the board to translate an x86-IO port to memory address or
simply returns the port plus an offset).

Thanks!
        Manuel Lauss