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Wed, 3 Jul 2024 16:08:29 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-566-g3812ddbbc-fm-20240627.001-g3812ddbb Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: In-Reply-To: References: <20240616-b4-mips-ipi-improvements-v1-0-e332687f1692@flygoat.com> <20240616-b4-mips-ipi-improvements-v1-2-e332687f1692@flygoat.com> Date: Thu, 04 Jul 2024 04:08:09 +0800 From: "Jiaxun Yang" To: "Thomas Bogendoerfer" Cc: "Florian Fainelli" , "Broadcom internal kernel review list" , "Huacai Chen" , "Thomas Gleixner" , "Serge Semin" , "paulburton@kernel.org" , "linux-mips@vger.kernel.org" , linux-kernel@vger.kernel.org Subject: Re: [PATCH 02/10] MIPS: smp: Manage IPI interrupts as percpu_devid interrupts Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable =E5=9C=A82024=E5=B9=B47=E6=9C=883=E6=97=A5=E4=B8=83=E6=9C=88 =E4=B8=8B=E5= =8D=8811:03=EF=BC=8CThomas Bogendoerfer=E5=86=99=E9=81=93=EF=BC=9A [...] > > there is no user of mips_smp_ipi_disable() (at least I didn't see one), > so do we need this patch at all ? Just looking like ARM or RiscV isn't > a justification for code churn. Hi Thomas, The per-cpu enablement process is necessary for IPI_MUX and my upcoming IPI driver. The disablement, I'm not really sure, maybe it's a good idea to call it = at platform's __cpu_disable to prevent spurious IPI after IRQ migration. Thanks - Jiaxun > > Thomas. > > --=20 > Crap can work. Given enough thrust pigs will fly, but it's not necessa= rily a > good idea. [ RFC1925, 2= .3 ] --=20 - Jiaxun