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From:   khalasa@piap.pl (Krzysztof =?utf-8?Q?Ha=C5=82asa?=)
To:     Ralf Baechle <ralf@linux-mips.org>
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Date:   Tue, 08 Oct 2013 12:46:55 +0200
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Subject: Re: Suspected cache coherency problem on V4L2 and AR7100 CPU
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Ralf Baechle <ralf@linux-mips.org> writes:

> That's fine.  You just need to ensure that there are no virtual aliases.
> One way to do so is to increase the page size to 16kB.

Checked, this thing works fine with 16 KB pages.
-- 
Krzysztof Halasa

Research Institute for Automation and Measurements PIAP
Al. Jerozolimskie 202, 02-486 Warsaw, Poland