* [PATCH] MIPS: lib: Remove '.hidden' for local symbols
From: Nathan Chancellor @ 2026-06-09 3:36 UTC (permalink / raw)
To: Thomas Bogendoerfer; +Cc: linux-mips, linux-kernel, Nathan Chancellor
After a recent change in binutils that warns when local symbols have
non-default visibility [1], there are a couple instances when building
arch/mips:
Assembler messages:
{standard input}: Warning: local symbol `__memset' has non-default visibility
Assembler messages:
{standard input}: Warning: local symbol `__memcpy' has non-default visibility
Remove the '.hidden' directives for these symbols to clear up the
warnings, as they are pointless with a local symbol, which is by
definition hidden. This results in no changes to these symbols in nm's
output when assembled with various copies of binutils.
Closes: https://lore.kernel.org/20260509122517.GA1108596@ax162/
Link: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=c4150acbda1b3ce0602f79cbb7700b39e577be7e [1]
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
---
arch/mips/lib/memcpy.S | 2 --
arch/mips/lib/memset.S | 2 --
2 files changed, 4 deletions(-)
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index a4b4e805ff13..84f85aba6f4b 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -274,7 +274,6 @@
/* initialize __memcpy if this the first time we execute this macro */
.ifnotdef __memcpy
.set __memcpy, 1
- .hidden __memcpy /* make sure it does not leak */
.endif
/*
@@ -538,7 +537,6 @@
.if __memcpy == 1
END(memcpy)
.set __memcpy, 0
- .hidden __memcpy
.endif
.Ll_exc_copy\@:
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
index 79405c32cc85..ab087406da66 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/memset.S
@@ -89,7 +89,6 @@
/* Initialize __memset if this is the first time we call this macro */
.ifnotdef __memset
.set __memset, 1
- .hidden __memset /* Make sure it does not leak */
.endif
sltiu t0, a2, STORSIZE /* very small region? */
@@ -231,7 +230,6 @@
.if __memset == 1
END(memset)
.set __memset, 0
- .hidden __memset
.endif
#ifdef CONFIG_CPU_NO_LOAD_STORE_LR
---
base-commit: 6d96cc123ce33cd74e799c5434440393ed022bb7
change-id: 20260608-mips-fix-binutils-visibility-warning-71e531e65f78
Best regards,
--
Cheers,
Nathan
^ permalink raw reply related
* [PATCH RESEND v2 2/2] ACPI: SPCR: Support UART clock frequency field
From: Markus Probst @ 2026-06-08 22:40 UTC (permalink / raw)
To: Rafael J. Wysocki, Len Brown, Geert Uytterhoeven,
Thomas Bogendoerfer, Ard Biesheuvel, Ilias Apalodimas,
Greg Kroah-Hartman, Jiri Slaby
Cc: linux-acpi, linux-kernel, linux-m68k, linux-mips, linux-efi,
linux-serial, Markus Probst
In-Reply-To: <20260609-acpi_spcr-v2-0-3cd9a3bda727@posteo.de>
The Microsoft Serial Port Console Redirection (SPCR) specification
revision 1.08 comprises additional field: UART Clock Frequency [1].
It contains a non-zero value indicating the UART clock frequency in Hz.
Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table [1]
Signed-off-by: Markus Probst <markus.probst@posteo.de>
---
drivers/acpi/spcr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
index cfacbe53f279..16f94073fde6 100644
--- a/drivers/acpi/spcr.c
+++ b/drivers/acpi/spcr.c
@@ -228,7 +228,7 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
pr_info("console: %s\n", opts);
if (enable_earlycon)
- setup_earlycon(opts, 0);
+ setup_earlycon(opts, table->header.revision >= 3 ? table->uart_clk_freq : 0);
if (enable_console)
err = add_preferred_console(uart, 0, opts + strlen(uart) + 1);
--
2.53.0
^ permalink raw reply related
* [PATCH RESEND v2 1/2] serial: earlycon: add uart_clk_freq parameter
From: Markus Probst @ 2026-06-08 22:40 UTC (permalink / raw)
To: Rafael J. Wysocki, Len Brown, Geert Uytterhoeven,
Thomas Bogendoerfer, Ard Biesheuvel, Ilias Apalodimas,
Greg Kroah-Hartman, Jiri Slaby
Cc: linux-acpi, linux-kernel, linux-m68k, linux-mips, linux-efi,
linux-serial, Markus Probst
In-Reply-To: <20260609-acpi_spcr-v2-0-3cd9a3bda727@posteo.de>
Add `uart_clk_freq` parameter to `setup_earlycon`. This allows the
options string to be reused with `add_preferred_console`, while still
allowing to set the uart clock frequency. This will be used in the
following commit ("ACPI: SPCR: Support UART clock frequency field").
No logical change intended.
Signed-off-by: Markus Probst <markus.probst@posteo.de>
---
arch/m68k/virt/config.c | 2 +-
arch/mips/mti-malta/malta-init.c | 2 +-
drivers/acpi/spcr.c | 2 +-
drivers/firmware/efi/earlycon.c | 2 +-
drivers/tty/serial/earlycon.c | 17 ++++++++++++-----
include/linux/serial_core.h | 7 +++++--
6 files changed, 21 insertions(+), 11 deletions(-)
diff --git a/arch/m68k/virt/config.c b/arch/m68k/virt/config.c
index b338e2a8da6a..2c35ec15a51b 100644
--- a/arch/m68k/virt/config.c
+++ b/arch/m68k/virt/config.c
@@ -83,7 +83,7 @@ void __init config_virt(void)
snprintf(earlycon, sizeof(earlycon), "early_gf_tty,0x%08x",
virt_bi_data.tty.mmio);
- setup_earlycon(earlycon);
+ setup_earlycon(earlycon, 0);
mach_init_IRQ = virt_init_IRQ;
mach_sched_init = virt_sched_init;
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index 82b0fd8576a2..88ef17967ced 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -75,7 +75,7 @@ static void __init console_config(void)
if ((strstr(fw_getcmdline(), "earlycon=")) == NULL) {
sprintf(console_string, "uart8250,io,0x3f8,%d%c%c", baud,
parity, bits);
- setup_earlycon(console_string);
+ setup_earlycon(console_string, 0);
}
if ((strstr(fw_getcmdline(), "console=")) == NULL) {
diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
index 73cb933fdc89..cfacbe53f279 100644
--- a/drivers/acpi/spcr.c
+++ b/drivers/acpi/spcr.c
@@ -228,7 +228,7 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
pr_info("console: %s\n", opts);
if (enable_earlycon)
- setup_earlycon(opts);
+ setup_earlycon(opts, 0);
if (enable_console)
err = add_preferred_console(uart, 0, opts + strlen(uart) + 1);
diff --git a/drivers/firmware/efi/earlycon.c b/drivers/firmware/efi/earlycon.c
index 3d060d59968c..0e3c2cb08966 100644
--- a/drivers/firmware/efi/earlycon.c
+++ b/drivers/firmware/efi/earlycon.c
@@ -221,7 +221,7 @@ static bool __initdata fb_probed;
void __init efi_earlycon_reprobe(void)
{
if (fb_probed)
- setup_earlycon("efifb");
+ setup_earlycon("efifb", 0);
}
static int __init efi_earlycon_setup(struct earlycon_device *device,
diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c
index ab9af37f6cda..a419943e083b 100644
--- a/drivers/tty/serial/earlycon.c
+++ b/drivers/tty/serial/earlycon.c
@@ -135,11 +135,14 @@ static int __init parse_options(struct earlycon_device *device, char *options)
return 0;
}
-static int __init register_earlycon(char *buf, const struct earlycon_id *match)
+static int __init register_earlycon(char *buf, unsigned int uart_clk_freq,
+ const struct earlycon_id *match)
{
int err;
struct uart_port *port = &early_console_dev.port;
+ port->uartclk = uart_clk_freq;
+
/* On parsing error, pass the options buf to the setup function */
if (buf && !parse_options(&early_console_dev, buf))
buf = NULL;
@@ -164,7 +167,8 @@ static int __init register_earlycon(char *buf, const struct earlycon_id *match)
/**
* setup_earlycon - match and register earlycon console
- * @buf: earlycon param string
+ * @buf: earlycon param string
+ * @uart_clk_freq: uart clock frequency in Hz or 0 for BASE_BAUD*16
*
* Registers the earlycon console matching the earlycon specified
* in the param string @buf. Acceptable param strings are of the form
@@ -177,10 +181,13 @@ static int __init register_earlycon(char *buf, const struct earlycon_id *match)
* <options> string in the 'options' parameter; all other forms set
* the parameter to NULL.
*
+ * If the uart clock frequency is specified in the 'options' parameter,
+ * the value of the param @uart_clk_freq will be ignored.
+ *
* Returns 0 if an attempt to register the earlycon was made,
* otherwise negative error code
*/
-int __init setup_earlycon(char *buf)
+int __init setup_earlycon(char *buf, unsigned int uart_clk_freq)
{
const struct earlycon_id *match;
bool empty_compatible = true;
@@ -209,7 +216,7 @@ int __init setup_earlycon(char *buf)
} else
buf = NULL;
- return register_earlycon(buf, match);
+ return register_earlycon(buf, uart_clk_freq, match);
}
if (empty_compatible) {
@@ -241,7 +248,7 @@ static int __init param_setup_earlycon(char *buf)
}
}
- err = setup_earlycon(buf);
+ err = setup_earlycon(buf, 0);
if (err == -ENOENT || err == -EALREADY)
return 0;
return err;
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 666430b47899..5c60fda9dd3a 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -1097,10 +1097,13 @@ int of_setup_earlycon(const struct earlycon_id *match, unsigned long node,
#ifdef CONFIG_SERIAL_EARLYCON
extern bool earlycon_acpi_spcr_enable __initdata;
-int setup_earlycon(char *buf);
+int setup_earlycon(char *buf, unsigned int uart_clk_freq);
#else
static const bool earlycon_acpi_spcr_enable EARLYCON_USED_OR_UNUSED;
-static inline int setup_earlycon(char *buf) { return 0; }
+static inline int setup_earlycon(char *buf, unsigned int uart_clk_freq)
+{
+ return 0;
+}
#endif
/* Variant of uart_console_registered() when the console_list_lock is held. */
--
2.53.0
^ permalink raw reply related
* [PATCH RESEND v2 0/2] ACPI: SPCR: Support UART clock frequency field
From: Markus Probst @ 2026-06-08 22:40 UTC (permalink / raw)
To: Rafael J. Wysocki, Len Brown, Geert Uytterhoeven,
Thomas Bogendoerfer, Ard Biesheuvel, Ilias Apalodimas,
Greg Kroah-Hartman, Jiri Slaby
Cc: linux-acpi, linux-kernel, linux-m68k, linux-mips, linux-efi,
linux-serial, Markus Probst
Support the uart clock frequency in the SPCR table.
See the commit messages for details.
Signed-off-by: Markus Probst <markus.probst@posteo.de>
---
Changes in v2:
- fix uart_clk_freq possibly being interpreted as parity/bits/flow
- Link to v1: https://patch.msgid.link/20260505-acpi_spcr-v1-1-fd4bc6f4eb53@posteo.de
---
Markus Probst (2):
serial: earlycon: add uart_clk_freq parameter
ACPI: SPCR: Support UART clock frequency field
arch/m68k/virt/config.c | 2 +-
arch/mips/mti-malta/malta-init.c | 2 +-
drivers/acpi/spcr.c | 2 +-
drivers/firmware/efi/earlycon.c | 2 +-
drivers/tty/serial/earlycon.c | 17 ++++++++++++-----
include/linux/serial_core.h | 7 +++++--
6 files changed, 21 insertions(+), 11 deletions(-)
---
base-commit: aa61612ab641d7d62b0b6889f2c7c9251489f6e3
change-id: 20260430-acpi_spcr-61902fd923f2
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--
Markus Probst <markus.probst@posteo.de>
^ permalink raw reply
* Re: [PATCH 35/60] kvm: Add VCPU plane-scheduling state and helpers
From: Paolo Bonzini @ 2026-06-08 17:58 UTC (permalink / raw)
To: Jörg Rödel
Cc: Sean Christopherson, Tom Lendacky, ashish.kalra, michael.roth,
nsaenz, anelkz, James.Bottomley, Melody Wang, kvm, linux-kernel,
kvmarm, loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86,
coconut-svsm, joerg.roedel
In-Reply-To: <aib8n5lO6HKbLC4Y@8bytes.org>
On Mon, Jun 8, 2026 at 7:52 PM Jörg Rödel <joro@8bytes.org> wrote:
> On Mon, Jun 08, 2026 at 06:47:54PM +0200, Paolo Bonzini wrote:
> > On 6/8/26 16:42, Jörg Rödel wrote:
> > > The algorithm is to always run the lowest runnable plane. Plane
> > > switches are done by stopping the current plane and setting another
> > > runnable.
> >
> > This was left arbitrary in my version because for example Hyper-V VTLs use
> > highest-runnable instead. It also made pure userspace scheduling possible,
> > though that may not be very important in the grand scheme of things.
>
> IIRC what Hyper-V does is always the run the highest-privileged runnable level,
> no? Maybe in their numbering level 0 has the least privileges?
Yes, exactly.
> Anyway, I am happy to make changes here, also based on input from the VSM side.
Related to this, let me know if you want me to pick up again the
common part, especially with Sashiko being hard at work on it.
> > Did you drop it because it didn't work, or just for simplicity?
>
> The user-space scheduling worked, my 6.17 planes implementation used it. But
> there are some problems with it going forward, because TDX Partitioning (and
> likely ARM CCA Planes as well) do not allow arbitrary switches forced by the
> hypervisor. All they allow is a forced switch to the highest privileged plane,
> the SVSM on SNP will force the same constraints by making lower-privilege VMSAs
> not-runnable when it executes.
The idea of the userspace scheduling was that you're not forced to use
it - the kernel can always choose to override it if it's using an
accelerated implementation of planes (and of plane switching). But it
also leaves some leeway to different accelerated implementations, each
of which can pick their own algorithm.
Conceptually I'd rather keep the possibility of userspace scheduling.
But maybe it doesn't add much.
Paolo
> So exposing an interface for user-space to chose which plane to run does seem
> to gain some weird, platform dependent semantics going forward. TDX and CCA
> also require in-kernel switching as they can switch planes without a VMEXIT, so
> I decided to have it from the start.
>
>
> -Joerg
>
^ permalink raw reply
* Re: [PATCH 35/60] kvm: Add VCPU plane-scheduling state and helpers
From: Jörg Rödel @ 2026-06-08 17:52 UTC (permalink / raw)
To: Paolo Bonzini
Cc: Sean Christopherson, Tom Lendacky, ashish.kalra, michael.roth,
nsaenz, anelkz, James.Bottomley, Melody Wang, kvm, linux-kernel,
kvmarm, loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86,
coconut-svsm, joerg.roedel
In-Reply-To: <e7eb0dba-790a-4644-9895-5c9a7420d7fe@redhat.com>
Hi Paolo,
On Mon, Jun 08, 2026 at 06:47:54PM +0200, Paolo Bonzini wrote:
> On 6/8/26 16:42, Jörg Rödel wrote:
> > From: Joerg Roedel <joerg.roedel@amd.com>
> >
> > The algorithm is to always run the lowest runnable plane. Plane
> > switches are done by stopping the current plane and setting another
> > runnable.
> >
> > Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
>
> This was left arbitrary in my version because for example Hyper-V VTLs use
> highest-runnable instead. It also made pure userspace scheduling possible,
> though that may not be very important in the grand scheme of things.
IIRC what Hyper-V does is always the run the highest-privileged runnable level,
no? Maybe in their numbering level 0 has the least privileges? Anyway, I am
happy to make changes here, also based on input from the VSM side.
> Did you drop it because it didn't work, or just for simplicity?
The user-space scheduling worked, my 6.17 planes implementation used it. But
there are some problems with it going forward, because TDX Partitioning (and
likely ARM CCA Planes as well) do not allow arbitrary switches forced by the
hypervisor. All they allow is a forced switch to the highest privileged plane,
the SVSM on SNP will force the same constraints by making lower-privilege VMSAs
not-runnable when it executes.
So exposing an interface for user-space to chose which plane to run does seem
to gain some weird, platform dependent semantics going forward. TDX and CCA
also require in-kernel switching as they can switch planes without a VMEXIT, so
I decided to have it from the start.
-Joerg
^ permalink raw reply
* Re: [PATCH 35/60] kvm: Add VCPU plane-scheduling state and helpers
From: Paolo Bonzini @ 2026-06-08 16:47 UTC (permalink / raw)
To: Jörg Rödel, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-36-joro@8bytes.org>
On 6/8/26 16:42, Jörg Rödel wrote:
> From: Joerg Roedel <joerg.roedel@amd.com>
>
> The algorithm is to always run the lowest runnable plane. Plane
> switches are done by stopping the current plane and setting another
> runnable.
>
> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
This was left arbitrary in my version because for example Hyper-V VTLs
use highest-runnable instead. It also made pure userspace scheduling
possible, though that may not be very important in the grand scheme of
things.
Did you drop it because it didn't work, or just for simplicity?
Paolo
> ---
> include/linux/kvm_host.h | 16 ++++++++++++++
> virt/kvm/kvm_main.c | 45 ++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 61 insertions(+)
>
> diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
> index 5c3f9dfa15ea..e3611e6cc3e4 100644
> --- a/include/linux/kvm_host.h
> +++ b/include/linux/kvm_host.h
> @@ -168,6 +168,7 @@ static inline bool kvm_is_error_gpa(gpa_t gpa)
> #define KVM_REQ_VM_DEAD (1 | KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
> #define KVM_REQ_UNBLOCK 2
> #define KVM_REQ_DIRTY_RING_SOFT_FULL 3
> +#define KVM_REQ_PLANE_RESCHED 4
> #define KVM_REQUEST_ARCH_BASE 8
>
> /*
> @@ -324,6 +325,8 @@ struct kvm_mmio_fragment {
> unsigned int len;
> };
>
> +
> +
> struct kvm_vcpu_common {
> struct kvm *kvm;
>
> @@ -381,6 +384,8 @@ struct kvm_vcpu_common {
>
> struct kvm_dirty_ring dirty_ring;
>
> + bool plane_switch;
> +
> struct kvm_vcpu_arch_common arch;
> };
>
> @@ -388,6 +393,12 @@ struct kvm_vcpu_common {
> for ((i) = 0; (i) < KVM_MAX_PLANES; ++(i)) \
> if (((v) = common->vcpus[(i)]) != NULL)
>
> +/* Tracked per plane-VCPU - used for deciding which plane-vcpu to run */
> +enum kvm_vcpu_state {
> + STOPPED,
> + RUNNABLE,
> +};
> +
> struct kvm_vcpu {
> struct kvm *kvm;
> struct kvm_plane *plane;
> @@ -401,6 +412,7 @@ struct kvm_vcpu {
> struct kvm_run *run;
>
> u64 plane_requests;
> + enum kvm_vcpu_state plane_state;
>
> /* S390 only */
> bool valid_wakeup;
> @@ -440,6 +452,10 @@ struct kvm_vcpu {
> unsigned plane_level;
> };
>
> +void kvm_vcpu_set_plane_runnable(struct kvm_vcpu *vcpu);
> +void kvm_vcpu_set_plane_stopped(struct kvm_vcpu *vcpu);
> +struct kvm_vcpu *kvm_vcpu_select_plane(struct kvm_vcpu *vcpu);
> +
> static inline bool kvm_vcpu_wants_to_run(struct kvm_vcpu *vcpu)
> {
> return vcpu->common->wants_to_run;
> diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
> index 9d30fd85ce5f..a30123b77112 100644
> --- a/virt/kvm/kvm_main.c
> +++ b/virt/kvm/kvm_main.c
> @@ -4397,6 +4397,7 @@ static int kvm_plane_ioctl_create_vcpu(struct kvm_plane *plane, unsigned long id
> vcpu->vcpu_idx = vcpu->common->vcpu_idx;
> vcpu->plane = plane;
> vcpu->plane_level = plane->level;
> + vcpu->plane_state = STOPPED;
> vcpu->run = vcpu->common->run;
>
> kvm_vcpu_init(vcpu, kvm, id);
> @@ -4938,6 +4939,50 @@ static struct file_operations kvm_plane_fops = {
> KVM_COMPAT(kvm_plane_ioctl),
> };
>
> +void kvm_vcpu_set_plane_runnable(struct kvm_vcpu *vcpu)
> +{
> + vcpu->plane_state = RUNNABLE;
> + vcpu->common->plane_switch = true;
> + kvm_make_request(KVM_REQ_PLANE_RESCHED, vcpu);
> +}
> +EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_vcpu_set_plane_runnable);
> +
> +void kvm_vcpu_set_plane_stopped(struct kvm_vcpu *vcpu)
> +{
> + vcpu->plane_state = STOPPED;
> + kvm_make_request(KVM_REQ_PLANE_RESCHED, vcpu);
> +}
> +EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_vcpu_set_plane_stopped);
> +
> +struct kvm_vcpu *kvm_vcpu_select_plane(struct kvm_vcpu *vcpu)
> +{
> + struct kvm_vcpu_common *common = vcpu->common;
> + struct kvm_vcpu *ret = NULL;
> + unsigned i;
> +
> + for (i = 0; i < KVM_MAX_PLANES; i++) {
> + if (common->vcpus[i] == NULL)
> + continue;
> +
> + if (common->vcpus[i]->plane_state == RUNNABLE) {
> + ret = common->vcpus[i];
> + break;
> + }
> + }
> +
> + if (ret == NULL) {
> + ret = common->vcpus[0];
> + ret->plane_state = RUNNABLE;
> + }
> +
> + common->current_vcpu = ret;
> +
> + common->plane_switch = false;
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_vcpu_select_plane);
> +
> static int kvm_device_mmap(struct file *filp, struct vm_area_struct *vma)
> {
> struct kvm_device *dev = filp->private_data;
^ permalink raw reply
* [PATCH 59/60] kvm: svm: Implement max_planes x86 operation
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Tom Lendacky <thomas.lendacky@amd.com>
Report the number of VMPL levels supported by SEV-SNP guests.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Co-developed-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/svm/sev.c | 14 ++++++++++++--
arch/x86/kvm/svm/svm.c | 12 +++++++++++-
arch/x86/kvm/svm/svm.h | 3 +++
3 files changed, 26 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index b67566fcb69e..528c8bd3e8fc 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -114,6 +114,7 @@ static unsigned long sev_me_mask;
static unsigned int nr_asids;
static unsigned long *sev_asid_bitmap;
static unsigned long *sev_reclaim_asid_bitmap;
+static unsigned int vmpl_levels;
static __always_inline void kvm_lockdep_assert_sev_lock_held(struct kvm *kvm)
{
@@ -3103,6 +3104,9 @@ void __init sev_hardware_setup(void)
/* Set encryption bit location for SEV-ES guests */
sev_enc_bit = ebx & 0x3f;
+ /* Get the number of supported VMPL levels */
+ vmpl_levels = (ebx >> 12) & 0xf;
+
/* Maximum number of encrypted guests supported simultaneously */
max_sev_asid = ecx;
if (!max_sev_asid)
@@ -3217,9 +3221,10 @@ void __init sev_hardware_setup(void)
"disabled",
min_sev_es_asid, max_sev_es_asid);
if (boot_cpu_has(X86_FEATURE_SEV_SNP))
- pr_info("SEV-SNP %s (ASIDs %u - %u)\n",
+ pr_info("SEV-SNP %s (ASIDs %u - %u), VMPL Levels %u\n",
str_enabled_disabled(sev_snp_supported),
- min_snp_asid, max_snp_asid);
+ min_snp_asid, max_snp_asid,
+ vmpl_levels);
sev_enabled = sev_supported;
sev_es_enabled = sev_es_supported;
@@ -5852,3 +5857,8 @@ bool sev_snp_blocked(enum inject_type type, struct kvm_vcpu *vcpu)
return blocked;
}
+
+int sev_snp_max_planes(struct kvm *kvm)
+{
+ return vmpl_levels;
+}
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 2ae82dc058c9..705063c7f0f0 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -5321,6 +5321,16 @@ static void svm_free_plane(struct kvm_plane *plane)
kfree(svm_plane);
}
+static unsigned svm_max_planes(struct kvm *kvm)
+{
+#ifdef CONFIG_KVM_AMD_SEV
+ if (____sev_snp_guest(kvm))
+ return sev_snp_max_planes(kvm);
+#endif
+
+ return kvm_x86_default_max_planes(kvm);
+}
+
struct kvm_x86_ops svm_x86_ops __initdata = {
.name = KBUILD_MODNAME,
@@ -5465,7 +5475,7 @@ struct kvm_x86_ops svm_x86_ops __initdata = {
.alloc_plane = svm_alloc_plane,
.free_plane = svm_free_plane,
- .max_planes = kvm_x86_default_max_planes,
+ .max_planes = svm_max_planes,
};
/*
diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 7e860f2abafb..7aba2cceb44d 100644
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -1008,6 +1008,8 @@ static inline bool sev_snp_is_rinj_active(struct kvm_vcpu *vcpu)
return is_sev_snp_guest(vcpu) &&
(sev->vmsa_features & SVM_SEV_FEAT_RESTRICTED_INJECTION);
};
+int sev_nr_vcpu_planes(struct kvm *kvm);
+int sev_snp_max_planes(struct kvm *kvm);
#else
static inline struct page *snp_safe_alloc_page_node(int node, gfp_t gfp)
{
@@ -1051,6 +1053,7 @@ static inline bool sev_snp_inject(enum inject_type type, struct kvm_vcpu *vcpu)
static inline void sev_snp_cancel_injection(struct kvm_vcpu *vcpu) {}
static inline bool sev_snp_blocked(enum inject_type type, struct kvm_vcpu *vcpu) { return false; }
static inline bool sev_snp_is_rinj_active(struct kvm_vcpu *vcpu) { return false; }
+static inline unsigned sev_snp_max_planes(struct kvm *kvm) { return 1; }
#endif
/* vmenter.S */
--
2.53.0
^ permalink raw reply related
* [PATCH 60/60] kvm: svm: Advertise full multi-VMPL support to the SNP guest
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Tom Lendacky <thomas.lendacky@amd.com>
Indicate full multi-VMPL support to the guest through the GHCB feature
bitmap.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Co-developed-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/svm/sev.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index 528c8bd3e8fc..0736e1c778d9 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -43,7 +43,8 @@
#define GHCB_HV_FT_SUPPORTED (GHCB_HV_FT_SNP | \
GHCB_HV_FT_SNP_AP_CREATION | \
GHCB_HV_FT_SNP_RINJ | \
- GHCB_HV_FT_APIC_ID_LIST)
+ GHCB_HV_FT_APIC_ID_LIST | \
+ GHCB_HV_FT_SNP_MULTI_VMPL)
/*
* The GHCB spec essentially states that all non-zero error codes other than
--
2.53.0
^ permalink raw reply related
* [PATCH 58/60] kvm: svm: Invoke a specified VMPL level VMSA for the vCPU
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Tom Lendacky <thomas.lendacky@amd.com>
Implement the SNP Run VMPL NAE event and MSR protocol to allow a guest to
request a different VMPL level VMSA be run for the vCPU. This allows the
guest to "call" an SVSM to process an SVSM request.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Co-developed-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/sev-common.h | 6 +++
arch/x86/kvm/svm/sev.c | 71 +++++++++++++++++++++++++++++++
2 files changed, 77 insertions(+)
diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h
index cedb7ea91da5..a09cf5690aba 100644
--- a/arch/x86/include/asm/sev-common.h
+++ b/arch/x86/include/asm/sev-common.h
@@ -114,6 +114,8 @@ enum psc_op {
/* GHCB Run at VMPL Request/Response */
#define GHCB_MSR_VMPL_REQ 0x016
+#define GHCB_MSR_VMPL_LEVEL_POS 32
+#define GHCB_MSR_VMPL_LEVEL_MASK GENMASK_ULL(7, 0)
#define GHCB_MSR_VMPL_REQ_LEVEL(v) \
/* GHCBData[39:32] */ \
((((u64)(v) & GENMASK_ULL(7, 0)) << 32) | \
@@ -121,6 +123,10 @@ enum psc_op {
GHCB_MSR_VMPL_REQ)
#define GHCB_MSR_VMPL_RESP 0x017
+#define GHCB_MSR_VMPL_ERROR_POS 32
+#define GHCB_MSR_VMPL_ERROR_MASK GENMASK_ULL(31, 0)
+#define GHCB_MSR_VMPL_RSVD_POS 12
+#define GHCB_MSR_VMPL_RSVD_MASK GENMASK_ULL(19, 0)
#define GHCB_MSR_VMPL_RESP_VAL(v) \
/* GHCBData[63:32] */ \
(((u64)(v) & GENMASK_ULL(63, 32)) >> 32)
diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index 53cd3aba7368..b67566fcb69e 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -3556,6 +3556,10 @@ static int sev_es_validate_vmgexit(struct vcpu_svm *svm)
if (!sev_snp_guest(vcpu->kvm))
goto vmgexit_err;
break;
+ case SVM_VMGEXIT_SNP_RUN_VMPL:
+ if (!sev_snp_guest(vcpu->kvm))
+ goto vmgexit_err;
+ break;
default:
reason = GHCB_ERR_INVALID_EVENT;
goto vmgexit_err;
@@ -4593,6 +4597,45 @@ static void sev_get_apic_ids(struct vcpu_svm *svm)
kvfree(desc);
}
+static int __sev_snp_run_vmpl(struct vcpu_svm *svm, unsigned int vmpl)
+{
+ struct kvm_vcpu *vcpu = &svm->vcpu;
+ struct kvm_vcpu *target = vcpu->common->vcpus[vmpl];
+ struct vcpu_svm *target_svm = to_svm(target);
+
+ if (!target)
+ return -EINVAL;
+
+ /* Mark current plane as stopped so it is not selected */
+ kvm_set_mp_state(target, KVM_MP_STATE_RUNNABLE);
+ /* In case KVM_REQ_UPDATE_PROTECTED_GUEST_STATE is set - mark the new VMSA as runnable */
+ target_svm->sev_es.snp_ap_runnable = true;
+ kvm_vcpu_set_plane_runnable(target);
+ kvm_vcpu_set_plane_stopped(vcpu);
+
+ kvm_make_request(KVM_REQ_PLANE_RESCHED, vcpu);
+
+ return 1;
+}
+
+static int sev_snp_run_vmpl(struct vcpu_svm *svm)
+{
+ struct ghcb *ghcb = svm->sev_es.ghcb;
+ struct kvm_vcpu *vcpu = &svm->vcpu;
+ unsigned int vmpl;
+
+ vmpl = lower_32_bits(svm->vmcb->control.exit_info_1);
+ if (vmpl >= SVM_SEV_VMPL_MAX) {
+ vcpu_unimpl(vcpu, "vmgexit: invalid VMPL level [%u] from guest\n", vmpl);
+ return -EINVAL;
+ }
+
+ ghcb_set_sw_exit_info_1(ghcb, 0);
+ ghcb_set_sw_exit_info_2(ghcb, 0);
+
+ return __sev_snp_run_vmpl(svm, vmpl);
+}
+
static int sev_handle_vmgexit_msr_protocol(struct vcpu_svm *svm)
{
struct vmcb_control_area *control = &svm->vmcb->control;
@@ -4704,6 +4747,27 @@ static int sev_handle_vmgexit_msr_protocol(struct vcpu_svm *svm)
ret = snp_begin_psc_msr(svm, control->ghcb_gpa);
break;
+ case GHCB_MSR_VMPL_REQ: {
+ unsigned int vmpl;
+
+ if (!sev_snp_guest(vcpu->kvm))
+ goto out_terminate;
+
+ vmpl = get_ghcb_msr_bits(svm, GHCB_MSR_VMPL_LEVEL_MASK, GHCB_MSR_VMPL_LEVEL_POS);
+
+ set_ghcb_msr_bits(svm, 0, GHCB_MSR_VMPL_ERROR_MASK, GHCB_MSR_VMPL_ERROR_POS);
+ set_ghcb_msr_bits(svm, 0, GHCB_MSR_VMPL_RSVD_MASK, GHCB_MSR_VMPL_RSVD_POS);
+ set_ghcb_msr_bits(svm, GHCB_MSR_VMPL_RESP, GHCB_MSR_INFO_MASK, GHCB_MSR_INFO_POS);
+
+ if (vmpl >= SVM_SEV_VMPL_MAX) {
+ vcpu_unimpl(vcpu, "vmgexit: invalid VMPL level [%u] from guest\n", vmpl);
+ set_ghcb_msr_bits(svm, 1, GHCB_MSR_VMPL_ERROR_MASK, GHCB_MSR_VMPL_ERROR_POS);
+ break;
+ }
+
+ ret = __sev_snp_run_vmpl(svm, vmpl);
+ break;
+ }
case GHCB_MSR_TERM_REQ: {
u64 reason_set, reason_code;
@@ -4887,6 +4951,13 @@ int sev_handle_vmgexit(struct kvm_vcpu *vcpu)
sev_get_apic_ids(svm);
ret = 1;
break;
+ case SVM_VMGEXIT_SNP_RUN_VMPL:
+ ret = sev_snp_run_vmpl(svm);
+ if (ret < 0) {
+ svm_vmgexit_bad_input(svm, GHCB_ERR_INVALID_INPUT);
+ ret = 1;
+ }
+ break;
case SVM_VMGEXIT_UNSUPPORTED_EVENT:
vcpu_unimpl(vcpu,
"vmgexit: unsupported event - exit_info_1=%#llx, exit_info_2=%#llx\n",
--
2.53.0
^ permalink raw reply related
* [PATCH 57/60] kvm: sev: Allow for VMPL level specification in AP create
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Tom Lendacky <thomas.lendacky@amd.com>
Update AP creation to support ADD/DESTROY of VMSAs at levels other than
VMPL0 in order to run under an SVSM at VMPL1 or lower. To maintain
backwards compatibility, the VMPL is specified in bits 16 to 19 of the
AP Creation request in SW_EXITINFO1 of the GHCB.
In order to track the VMSAs at different levels, create arrays for the
VMSAs, GHCBs, registered GHCBs and others. When switching VMPL levels,
these entries will be used to set the VMSA and GHCB physical addresses
in the VMCB for the VMPL level.
In order ensure that the proper responses are returned in the proper GHCB,
the GHCB must be unmapped at the current level and saved for restoration
later when switching back to that VMPL level.
Additional checks are applied to prevent a non-VMPL0 vCPU from being able
to perform an AP creation request at VMPL0. Additionally, a vCPU cannot
replace its own VMSA.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Co-developed-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/svm.h | 9 +++
arch/x86/include/uapi/asm/svm.h | 2 +
arch/x86/kvm/svm/sev.c | 134 +++++++++++++++++++++++++-------
arch/x86/kvm/svm/svm.h | 1 +
arch/x86/kvm/x86.c | 9 +++
5 files changed, 126 insertions(+), 29 deletions(-)
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index 9822b0b346ae..32a35ee10bce 100644
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -345,6 +345,15 @@ static_assert((X2AVIC_4K_MAX_PHYSICAL_ID & AVIC_PHYSICAL_MAX_INDEX_MASK) == X2AV
#define VMCB_ALLOWED_SEV_FEATURES_VALID BIT_ULL(63)
+enum {
+ SVM_SEV_VMPL0 = 0,
+ SVM_SEV_VMPL1,
+ SVM_SEV_VMPL2,
+ SVM_SEV_VMPL3,
+
+ SVM_SEV_VMPL_MAX
+};
+
struct vmcb_seg {
u16 selector;
u16 attrib;
diff --git a/arch/x86/include/uapi/asm/svm.h b/arch/x86/include/uapi/asm/svm.h
index 91395b82eadd..60b7a52f6f7e 100644
--- a/arch/x86/include/uapi/asm/svm.h
+++ b/arch/x86/include/uapi/asm/svm.h
@@ -123,6 +123,8 @@
#define SVM_VMGEXIT_HVDB_QUERY 2
#define SVM_VMGEXIT_HVDB_CLEAR 3
#define SVM_VMGEXIT_HV_IPI 0x80000015ull
+#define SVM_VMGEXIT_AP_VMPL_MASK GENMASK(19, 16)
+#define SVM_VMGEXIT_AP_VMPL_SHIFT 16
#define SVM_VMGEXIT_GET_APIC_IDS 0x80000017ull
#define SVM_VMGEXIT_SNP_RUN_VMPL 0x80000018ull
#define SVM_VMGEXIT_SAVIC 0x8000001aull
diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index c0b2879f8e9f..53cd3aba7368 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -3512,13 +3512,19 @@ static int sev_es_validate_vmgexit(struct vcpu_svm *svm)
if (!kvm_ghcb_sw_scratch_is_valid(svm))
goto vmgexit_err;
break;
- case SVM_VMGEXIT_AP_CREATION:
+ case SVM_VMGEXIT_AP_CREATION: {
+ unsigned int request;
+
if (!is_sev_snp_guest(vcpu))
goto vmgexit_err;
- if (lower_32_bits(control->exit_info_1) != SVM_VMGEXIT_AP_DESTROY)
+
+ request = lower_32_bits(control->exit_info_1);
+ request &= ~SVM_VMGEXIT_AP_VMPL_MASK;
+ if (request != SVM_VMGEXIT_AP_DESTROY)
if (!kvm_ghcb_rax_is_valid(svm))
goto vmgexit_err;
break;
+ }
case SVM_VMGEXIT_GET_APIC_IDS:
if (!kvm_ghcb_rax_is_valid(svm))
goto vmgexit_err;
@@ -4151,8 +4157,26 @@ static void sev_snp_init_protected_guest_state(struct kvm_vcpu *vcpu)
/* Use the new VMSA */
svm->vmcb->control.vmsa_pa = pfn_to_hpa(pfn);
+ /*
+ * The vCPU may not have gone through the LAUNCH_UPDATE process, so mark
+ * the guest state as protected.
+ */
+ vcpu->arch.guest_state_protected = true;
+
+ /*
+ * SEV-ES guest mandates LBR Virtualization to be _always_ ON. Enable it
+ * only after setting guest_state_protected because KVM_SET_MSRS allows
+ * dynamic toggling of LBRV (for performance reason) on write access to
+ * MSR_IA32_DEBUGCTLMSR when guest_state_protected is not set.
+ */
+ svm_enable_lbrv(vcpu);
+
/* Mark the vCPU as runnable */
- kvm_set_mp_state(vcpu, KVM_MP_STATE_RUNNABLE);
+ if (svm->sev_es.snp_ap_runnable) {
+ kvm_set_mp_state(vcpu, KVM_MP_STATE_RUNNABLE);
+ } else {
+ kvm_set_mp_state(vcpu, KVM_MP_STATE_UNINITIALIZED);
+ }
/*
* gmem pages aren't currently migratable, but if this ever changes
@@ -4162,36 +4186,87 @@ static void sev_snp_init_protected_guest_state(struct kvm_vcpu *vcpu)
kvm_release_page_clean(page);
}
-static int sev_snp_ap_creation(struct vcpu_svm *svm)
+static unsigned int get_ap_creation_request(struct vcpu_svm *svm)
{
- struct kvm_sev_info_plane *sev_plane = to_kvm_sev_info_plane(svm->vcpu.plane);
- struct kvm_vcpu *vcpu = &svm->vcpu;
- struct kvm_vcpu *target_vcpu;
- struct vcpu_svm *target_svm;
- unsigned int request;
+// struct kvm_sev_info_plane *sev_plane = to_kvm_sev_info_plane(svm->vcpu.plane);
+// struct kvm_vcpu *vcpu = &svm->vcpu;
+ unsigned int req = lower_32_bits(svm->vmcb->control.exit_info_1);
+
+ return req & ~SVM_VMGEXIT_AP_VMPL_MASK;
+}
+
+static unsigned int get_ap_creation_vmpl(struct vcpu_svm *svm)
+{
+ unsigned int req = lower_32_bits(svm->vmcb->control.exit_info_1);
+
+ return (req & SVM_VMGEXIT_AP_VMPL_MASK) >> SVM_VMGEXIT_AP_VMPL_SHIFT;
+}
+
+static unsigned int get_ap_creation_apic_id(struct vcpu_svm *svm)
+{
+ return upper_32_bits(svm->vmcb->control.exit_info_1);
+}
+
+#define SVM_SEV_VMPL_MAX 4
+
+static int sev_snp_ap_creation(struct kvm_vcpu *vcpu)
+{
+ struct vcpu_svm *target_svm = NULL, *svm = to_svm(vcpu);
+ struct kvm_sev_info_plane *target_sev_plane = NULL;
+ struct kvm_plane *target_plane = NULL;
+ struct kvm_vcpu *target_vcpu = NULL;
unsigned int apic_id;
+ unsigned int request;
+ unsigned int vmpl;
- request = lower_32_bits(svm->vmcb->control.exit_info_1);
- apic_id = upper_32_bits(svm->vmcb->control.exit_info_1);
+ request = get_ap_creation_request(svm);
+ apic_id = get_ap_creation_apic_id(svm);
+ vmpl = get_ap_creation_vmpl(svm);
- /* Validate the APIC ID */
- target_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, apic_id);
- if (!target_vcpu) {
- vcpu_unimpl(vcpu, "vmgexit: invalid AP APIC ID [%#x] from guest\n",
- apic_id);
+ /* Validate the requested VMPL level */
+ if (vmpl >= SVM_SEV_VMPL_MAX) {
+ vcpu_unimpl(vcpu, "vmgexit: invalid VMPL level [%u] from guest\n",
+ vmpl);
return -EINVAL;
}
+ vmpl = array_index_nospec(vmpl, SVM_SEV_VMPL_MAX);
+
+ /* Obtain the target plane and vCPU */
+ target_plane = vcpu->kvm->planes[vmpl];
+ if (target_plane) {
+ target_vcpu = plane_get_vcpu(target_plane, apic_id);
+ } else {
+ target_vcpu = NULL;
+ }
+
+ /* Request user-space to create target plane VCPU if it does not exist */
+ if (!target_plane || !target_vcpu) {
+ vcpu->arch.complete_userspace_io = sev_snp_ap_creation;
+ return kvm_request_create_plane(vcpu, vmpl, apic_id);
+ }
target_svm = to_svm(target_vcpu);
+ target_sev_plane = &to_kvm_svm_plane(target_svm->vcpu.plane)->sev_info_plane;
guard(mutex)(&target_svm->sev_es.snp_vmsa_mutex);
+ /* VMPL0 can only be replaced by another vCPU running VMPL0 */
+ if (vmpl == SVM_SEV_VMPL0 &&
+ (vcpu == target_vcpu || vcpu->plane_level != SVM_SEV_VMPL0)) {
+ vcpu_unimpl(vcpu, "vmgexit: VMPL0 AP action not allowed\n");
+ return -EINVAL;
+ }
+
switch (request) {
case SVM_VMGEXIT_AP_CREATE_ON_INIT:
case SVM_VMGEXIT_AP_CREATE:
- if (vcpu->arch.regs[VCPU_REGS_RAX] != sev_plane->vmsa_features) {
+ /* Initialize target planes SEV features if necessary */
+ if (target_sev_plane->vmsa_features == 0)
+ target_sev_plane->vmsa_features = vcpu->arch.regs[VCPU_REGS_RAX];
+
+ if (vcpu->arch.regs[VCPU_REGS_RAX] != target_sev_plane->vmsa_features) {
vcpu_unimpl(vcpu, "vmgexit: mismatched AP sev_features [%#lx] != [%#llx] from guest\n",
- vcpu->arch.regs[VCPU_REGS_RAX], sev_plane->vmsa_features);
+ vcpu->arch.regs[VCPU_REGS_RAX], target_sev_plane->vmsa_features);
return -EINVAL;
}
@@ -4226,16 +4301,18 @@ static int sev_snp_ap_creation(struct vcpu_svm *svm)
return -EINVAL;
}
+ /* Signal the vCPU to update its state */
+ kvm_make_request(KVM_REQ_UPDATE_PROTECTED_GUEST_STATE, target_vcpu);
+
target_svm->sev_es.snp_ap_waiting_for_reset = true;
+ target_svm->sev_es.snp_ap_runnable = (request == SVM_VMGEXIT_AP_CREATE);
- /*
- * Unless Creation is deferred until INIT, signal the vCPU to update
- * its state.
- */
- if (request != SVM_VMGEXIT_AP_CREATE_ON_INIT)
- kvm_make_request_and_kick(KVM_REQ_UPDATE_PROTECTED_GUEST_STATE, target_vcpu);
+ if (request == SVM_VMGEXIT_AP_CREATE)
+ kvm_make_request(KVM_REQ_PLANE_RESCHED, target_vcpu);
- return 0;
+ kvm_vcpu_kick(target_vcpu);
+
+ return 1;
}
static int snp_handle_guest_req(struct vcpu_svm *svm, gpa_t req_gpa, gpa_t resp_gpa)
@@ -4779,12 +4856,11 @@ int sev_handle_vmgexit(struct kvm_vcpu *vcpu)
ret = snp_begin_psc(svm);
break;
case SVM_VMGEXIT_AP_CREATION:
- ret = sev_snp_ap_creation(svm);
- if (ret) {
+ ret = sev_snp_ap_creation(vcpu);
+ if (ret < 0) {
svm_vmgexit_bad_input(svm, GHCB_ERR_INVALID_INPUT);
+ ret = 1;
}
-
- ret = 1;
break;
case SVM_VMGEXIT_GUEST_REQUEST:
ret = snp_handle_guest_req(svm, control->exit_info_1, control->exit_info_2);
diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 57033922ddcf..7e860f2abafb 100644
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -282,6 +282,7 @@ struct vcpu_sev_es_state {
struct mutex snp_vmsa_mutex; /* Used to handle concurrent updates of VMSA. */
gpa_t snp_vmsa_gpa;
+ bool snp_ap_runnable;
bool snp_ap_waiting_for_reset;
bool snp_has_guest_vmsa;
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 0b9fa1059481..ad05350bb393 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -12165,6 +12165,15 @@ static int __kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
kvm_vcpu_block(vcpu);
kvm_vcpu_srcu_read_lock(vcpu);
+ /*
+ * It is possible that the vCPU has never run before. If the
+ * request is to update the protected guest state (AP Create),
+ * then ensure that the vCPU can now run.
+ */
+ if (kvm_test_request(KVM_REQ_UPDATE_PROTECTED_GUEST_STATE, vcpu) &&
+ vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)
+ vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
+
if (kvm_apic_accept_events(vcpu) < 0) {
r = 0;
goto out;
--
2.53.0
^ permalink raw reply related
* [PATCH 54/60] kvm: x86: Restrict KVM planes support to KVM_IRQCHIP_SPLIT
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
The code right now only supports plane-aware IOAPIC IRQ routing for
IRQ-chip in split mode. Enforce that restriction in the KVM x86 code.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/x86.c | 8 ++++++--
include/linux/kvm_host.h | 1 +
virt/kvm/kvm_main.c | 5 +++++
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c6910356b061..0b9fa1059481 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -490,6 +490,10 @@ EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_x86_default_max_planes);
unsigned kvm_arch_max_planes(struct kvm *kvm)
{
+ /* For now, planes are only supported with irqchip=split */
+ if (!irqchip_split(kvm))
+ return 1;
+
return kvm_x86_call(max_planes)(kvm);
}
@@ -6833,7 +6837,7 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
if (cap->args[0] > KVM_MAX_IRQ_ROUTES)
goto split_irqchip_unlock;
r = -EEXIST;
- if (irqchip_in_kernel(kvm))
+ if (irqchip_in_kernel(kvm) || kvm->has_planes)
goto split_irqchip_unlock;
if (kvm->created_vcpus)
goto split_irqchip_unlock;
@@ -7398,7 +7402,7 @@ int kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
goto create_irqchip_unlock;
r = -EINVAL;
- if (kvm->created_vcpus)
+ if (kvm->created_vcpus || kvm->has_planes)
goto create_irqchip_unlock;
r = kvm_pic_init(kvm);
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 3b62fb354267..dbf81e2520f2 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -918,6 +918,7 @@ struct kvm {
struct list_head gpc_list;
struct kvm_plane *planes[KVM_MAX_PLANES];
+ bool has_planes;
/*
* created_vcpus is protected by kvm->lock, and is incremented
diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
index 8f1a16af519a..ff27cdbe8d92 100644
--- a/virt/kvm/kvm_main.c
+++ b/virt/kvm/kvm_main.c
@@ -5477,6 +5477,10 @@ static int kvm_vm_ioctl_create_plane(struct kvm *kvm, unsigned id)
WARN_ON_ONCE(id >= KVM_MAX_PLANES))
return -EINVAL;
+ /* Planes are only supported with in-kernel IRQ-chip */
+ if (!kvm_arch_irqchip_in_kernel(kvm))
+ return -EINVAL;
+
guard(mutex)(&kvm->lock);
if (kvm->planes[id])
return -EEXIST;
@@ -5498,6 +5502,7 @@ static int kvm_vm_ioctl_create_plane(struct kvm *kvm, unsigned id)
goto put_kvm;
}
+ kvm->has_planes = true;
fd_install(fd, file);
return fd;
--
2.53.0
^ permalink raw reply related
* [PATCH 56/60] kvm: svm: Implement GET_AP_APIC_IDS NAE event
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel, Carlos López
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Tom Lendacky <thomas.lendacky@amd.com>
Implement the GET_APIC_IDS NAE event to gather and return the list of
APIC IDs for all vCPUs in the guest.
Since it is now possible to launch vCPUs without going through the
LAUNCH_UPDATE process, be sure to mark the guest state protected and to
enable LBR virtualization.
Since it is now possible to launch vCPUs by APIC ID before the first
INIT-SIPI request, be sure to check for the AP create event in the
kvm_arch_vcpu_ioctl_run() loop when the AP is in the uninitialized state.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Co-developed-by: Joerg Roedel <joerg.roedel@amd.com>
Co-developed-by: Carlos López <clopez@suse.de>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/sev-common.h | 1 +
arch/x86/include/uapi/asm/svm.h | 1 +
arch/x86/kvm/svm/sev.c | 87 +++++++++++++++++++++++++++++--
3 files changed, 86 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h
index ee17a3541b55..cedb7ea91da5 100644
--- a/arch/x86/include/asm/sev-common.h
+++ b/arch/x86/include/asm/sev-common.h
@@ -137,6 +137,7 @@ enum psc_op {
#define GHCB_HV_FT_SNP BIT_ULL(0)
#define GHCB_HV_FT_SNP_AP_CREATION BIT_ULL(1)
#define GHCB_HV_FT_SNP_RINJ (BIT_ULL(2) | GHCB_HV_FT_SNP_AP_CREATION)
+#define GHCB_HV_FT_APIC_ID_LIST BIT_ULL(4)
#define GHCB_HV_FT_SNP_MULTI_VMPL BIT_ULL(5)
/*
diff --git a/arch/x86/include/uapi/asm/svm.h b/arch/x86/include/uapi/asm/svm.h
index d281dd21c540..91395b82eadd 100644
--- a/arch/x86/include/uapi/asm/svm.h
+++ b/arch/x86/include/uapi/asm/svm.h
@@ -123,6 +123,7 @@
#define SVM_VMGEXIT_HVDB_QUERY 2
#define SVM_VMGEXIT_HVDB_CLEAR 3
#define SVM_VMGEXIT_HV_IPI 0x80000015ull
+#define SVM_VMGEXIT_GET_APIC_IDS 0x80000017ull
#define SVM_VMGEXIT_SNP_RUN_VMPL 0x80000018ull
#define SVM_VMGEXIT_SAVIC 0x8000001aull
#define SVM_VMGEXIT_SAVIC_REGISTER_GPA 0
diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index 12b039823c1c..c0b2879f8e9f 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -40,9 +40,10 @@
#define GHCB_VERSION_MAX 2ULL
#define GHCB_VERSION_MIN 1ULL
-#define GHCB_HV_FT_SUPPORTED (GHCB_HV_FT_SNP | \
- GHCB_HV_FT_SNP_AP_CREATION | \
- GHCB_HV_FT_SNP_RINJ)
+#define GHCB_HV_FT_SUPPORTED (GHCB_HV_FT_SNP | \
+ GHCB_HV_FT_SNP_AP_CREATION | \
+ GHCB_HV_FT_SNP_RINJ | \
+ GHCB_HV_FT_APIC_ID_LIST)
/*
* The GHCB spec essentially states that all non-zero error codes other than
@@ -3518,6 +3519,10 @@ static int sev_es_validate_vmgexit(struct vcpu_svm *svm)
if (!kvm_ghcb_rax_is_valid(svm))
goto vmgexit_err;
break;
+ case SVM_VMGEXIT_GET_APIC_IDS:
+ if (!kvm_ghcb_rax_is_valid(svm))
+ goto vmgexit_err;
+ break;
case SVM_VMGEXIT_NMI_COMPLETE:
case SVM_VMGEXIT_AP_HLT_LOOP:
case SVM_VMGEXIT_AP_JUMP_TABLE:
@@ -4439,6 +4444,78 @@ static int sev_snp_hv_ipi(struct vcpu_svm *svm)
return 0;
}
+struct sev_apic_id_desc {
+ u32 num_entries;
+ u32 apic_ids[];
+};
+
+static void sev_get_apic_ids(struct vcpu_svm *svm)
+{
+ struct ghcb *ghcb = svm->sev_es.ghcb;
+ struct kvm_vcpu *vcpu = &svm->vcpu, *loop_vcpu;
+ struct kvm *kvm = vcpu->kvm;
+ unsigned int id_desc_size;
+ struct sev_apic_id_desc *desc;
+ struct page *page;
+ gpa_t gpa;
+ u64 pages;
+ unsigned long i;
+ int n;
+
+ pages = vcpu->arch.regs[VCPU_REGS_RAX];
+
+ /* Each APIC ID is 32-bits in size, so make sure there is room */
+ n = atomic_read(&kvm->online_vcpus);
+ /*TODO: is this possible? */
+ if (n < 0)
+ return;
+
+ id_desc_size = sizeof(*desc);
+ id_desc_size += n * sizeof(desc->apic_ids[0]);
+ if (id_desc_size > (pages * PAGE_SIZE)) {
+ vcpu->arch.regs[VCPU_REGS_RAX] = PFN_UP(id_desc_size);
+ return;
+ }
+
+ gpa = svm->vmcb->control.exit_info_1;
+
+ ghcb_set_sw_exit_info_1(ghcb, 2);
+ ghcb_set_sw_exit_info_2(ghcb, 5);
+
+ if (!page_address_valid(vcpu, gpa))
+ return;
+
+ page = gfn_to_page(kvm, gpa_to_gfn(gpa));
+ kvm_release_page_unused(page);
+ if (!page)
+ return;
+
+ if (!pages)
+ return;
+
+ /* Allocate a buffer to hold the APIC IDs */
+ desc = kvzalloc(id_desc_size, GFP_KERNEL_ACCOUNT);
+ if (!desc)
+ return;
+
+ desc->num_entries = n;
+ kvm_for_each_vcpu(i, loop_vcpu, kvm) {
+ /*TODO: is this possible? */
+ if (i >= n)
+ break;
+
+ desc->apic_ids[i] = loop_vcpu->vcpu_id;
+ }
+
+ if (!kvm_write_guest(kvm, gpa, desc, id_desc_size)) {
+ /* IDs were successfully written */
+ ghcb_set_sw_exit_info_1(ghcb, 0);
+ ghcb_set_sw_exit_info_2(ghcb, 0);
+ }
+
+ kvfree(desc);
+}
+
static int sev_handle_vmgexit_msr_protocol(struct vcpu_svm *svm)
{
struct vmcb_control_area *control = &svm->vmcb->control;
@@ -4730,6 +4807,10 @@ int sev_handle_vmgexit(struct kvm_vcpu *vcpu)
}
ret = 1;
break;
+ case SVM_VMGEXIT_GET_APIC_IDS:
+ sev_get_apic_ids(svm);
+ ret = 1;
+ break;
case SVM_VMGEXIT_UNSUPPORTED_EVENT:
vcpu_unimpl(vcpu,
"vmgexit: unsupported event - exit_info_1=%#llx, exit_info_2=%#llx\n",
--
2.53.0
^ permalink raw reply related
* [PATCH 55/60] kvm: svm: Track vmsa_features per plane
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
Planes can have different set of SEV features enabled. Track the
enabled features per plane instead of per VM.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/svm/sev.c | 37 ++++++++++++++++++++-----------------
arch/x86/kvm/svm/svm.c | 21 +++++++++++++++++++--
arch/x86/kvm/svm/svm.h | 24 +++++++++++++++++++++---
3 files changed, 60 insertions(+), 22 deletions(-)
diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index a23dcb081751..12b039823c1c 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -204,17 +204,16 @@ static inline bool is_mirroring_enc_context(struct kvm *kvm)
static bool sev_vcpu_has_debug_swap(struct vcpu_svm *svm)
{
- struct kvm_vcpu *vcpu = &svm->vcpu;
- struct kvm_sev_info *sev = to_kvm_sev_info(vcpu->kvm);
+ struct kvm_sev_info_plane *sev_plane = to_kvm_sev_info_plane(svm->vcpu.plane);
- return sev->vmsa_features & SVM_SEV_FEAT_DEBUG_SWAP;
+ return sev_plane->vmsa_features & SVM_SEV_FEAT_DEBUG_SWAP;
}
static bool snp_is_secure_tsc_enabled(struct kvm *kvm)
{
- struct kvm_sev_info *sev = to_kvm_sev_info(kvm);
+ struct kvm_sev_info_plane *sev_plane = to_kvm_sev_info_plane(kvm->planes[0]);
- return (sev->vmsa_features & SVM_SEV_FEAT_SECURE_TSC) &&
+ return (sev_plane->vmsa_features & SVM_SEV_FEAT_SECURE_TSC) &&
!WARN_ON_ONCE(!sev_snp_guest(kvm));
}
@@ -496,6 +495,7 @@ static int __sev_guest_init(struct kvm *kvm, struct kvm_sev_cmd *argp,
struct kvm_sev_init *data,
unsigned long vm_type)
{
+ struct kvm_sev_info_plane *sev_plane = to_kvm_sev_info_plane(kvm->planes[0]);
struct kvm_sev_info *sev = to_kvm_sev_info(kvm);
struct sev_platform_init_args init_args = {0};
bool es_active = vm_type != KVM_X86_SEV_VM;
@@ -534,11 +534,11 @@ static int __sev_guest_init(struct kvm *kvm, struct kvm_sev_cmd *argp,
sev->active = true;
sev->es_active = es_active;
- sev->vmsa_features = data->vmsa_features;
+ sev_plane->vmsa_features = data->vmsa_features;
sev->ghcb_version = data->ghcb_version;
if (snp_active)
- sev->vmsa_features |= SVM_SEV_FEAT_SNP_ACTIVE;
+ sev_plane->vmsa_features |= SVM_SEV_FEAT_SNP_ACTIVE;
ret = sev_asid_new(sev, vm_type);
if (ret)
@@ -576,7 +576,7 @@ static int __sev_guest_init(struct kvm *kvm, struct kvm_sev_cmd *argp,
sev_asid_free(sev);
sev->asid = 0;
e_no_asid:
- sev->vmsa_features = 0;
+ sev_plane->vmsa_features = 0;
sev->es_active = false;
sev->active = false;
return ret;
@@ -931,7 +931,7 @@ static int sev_launch_update_data(struct kvm *kvm, struct kvm_sev_cmd *argp)
static int sev_es_sync_vmsa(struct vcpu_svm *svm)
{
struct kvm_vcpu *vcpu = &svm->vcpu;
- struct kvm_sev_info *sev = to_kvm_sev_info(vcpu->kvm);
+ struct kvm_sev_info_plane *sev_plane = to_kvm_sev_info_plane(vcpu->plane);
struct sev_es_save_area *save = svm->sev_es.vmsa;
struct xregs_state *xsave;
const u8 *s;
@@ -982,7 +982,7 @@ static int sev_es_sync_vmsa(struct vcpu_svm *svm)
save->xss = svm->vcpu.arch.ia32_xss;
save->dr6 = svm->vcpu.arch.dr6;
- save->sev_features = sev->vmsa_features;
+ save->sev_features = sev_plane->vmsa_features;
/*
* Skip FPU and AVX setup with KVM_SEV_ES_INIT to avoid
@@ -2026,6 +2026,8 @@ static void sev_unlock_two_vms(struct kvm *dst_kvm, struct kvm *src_kvm)
static void sev_migrate_from(struct kvm *dst_kvm, struct kvm *src_kvm)
{
+ struct kvm_sev_info_plane *dst_plane = to_kvm_sev_info_plane(dst_kvm->planes[0]);
+ struct kvm_sev_info_plane *src_plane = to_kvm_sev_info_plane(src_kvm->planes[0]);
struct kvm_sev_info *dst = to_kvm_sev_info(dst_kvm);
struct kvm_sev_info *src = to_kvm_sev_info(src_kvm);
struct kvm_vcpu *dst_vcpu, *src_vcpu;
@@ -2039,7 +2041,7 @@ static void sev_migrate_from(struct kvm *dst_kvm, struct kvm *src_kvm)
dst->pages_locked = src->pages_locked;
dst->enc_context_owner = src->enc_context_owner;
dst->es_active = src->es_active;
- dst->vmsa_features = src->vmsa_features;
+ dst_plane->vmsa_features = src_plane->vmsa_features;
src->asid = 0;
src->active = false;
@@ -4157,7 +4159,7 @@ static void sev_snp_init_protected_guest_state(struct kvm_vcpu *vcpu)
static int sev_snp_ap_creation(struct vcpu_svm *svm)
{
- struct kvm_sev_info *sev = to_kvm_sev_info(svm->vcpu.kvm);
+ struct kvm_sev_info_plane *sev_plane = to_kvm_sev_info_plane(svm->vcpu.plane);
struct kvm_vcpu *vcpu = &svm->vcpu;
struct kvm_vcpu *target_vcpu;
struct vcpu_svm *target_svm;
@@ -4182,9 +4184,9 @@ static int sev_snp_ap_creation(struct vcpu_svm *svm)
switch (request) {
case SVM_VMGEXIT_AP_CREATE_ON_INIT:
case SVM_VMGEXIT_AP_CREATE:
- if (vcpu->arch.regs[VCPU_REGS_RAX] != sev->vmsa_features) {
+ if (vcpu->arch.regs[VCPU_REGS_RAX] != sev_plane->vmsa_features) {
vcpu_unimpl(vcpu, "vmgexit: mismatched AP sev_features [%#lx] != [%#llx] from guest\n",
- vcpu->arch.regs[VCPU_REGS_RAX], sev->vmsa_features);
+ vcpu->arch.regs[VCPU_REGS_RAX], sev_plane->vmsa_features);
return -EINVAL;
}
@@ -4815,15 +4817,16 @@ void sev_vcpu_after_set_cpuid(struct vcpu_svm *svm)
static void sev_snp_init_vmcb(struct vcpu_svm *svm)
{
- struct kvm_sev_info *sev = &to_kvm_svm(svm->vcpu.kvm)->sev_info;
+ struct kvm_sev_info_plane *sev_plane = &to_kvm_svm_plane(svm->vcpu.plane)->sev_info_plane;
/* V_NMI is not supported when Restricted Injection is enabled */
- if (sev->vmsa_features & SVM_SEV_FEAT_RESTRICTED_INJECTION)
+ if (sev_plane->vmsa_features & SVM_SEV_FEAT_RESTRICTED_INJECTION)
svm->vmcb->control.int_ctl &= ~V_NMI_ENABLE_MASK;
}
static void sev_es_init_vmcb(struct vcpu_svm *svm, bool init_event)
{
+ struct kvm_sev_info_plane *sev_plane = to_kvm_sev_info_plane(svm->vcpu.plane);
struct kvm_sev_info *sev = to_kvm_sev_info(svm->vcpu.kvm);
struct vmcb *vmcb = svm->vmcb01.ptr;
struct kvm_vcpu *vcpu = &svm->vcpu;
@@ -4845,7 +4848,7 @@ static void sev_es_init_vmcb(struct vcpu_svm *svm, bool init_event)
}
if (cpu_feature_enabled(X86_FEATURE_ALLOWED_SEV_FEATURES))
- svm->vmcb->control.allowed_sev_features = sev->vmsa_features |
+ svm->vmcb->control.allowed_sev_features = sev_plane->vmsa_features |
VMCB_ALLOWED_SEV_FEATURES_VALID;
/* Can't intercept CR register access, HV can't modify CR registers */
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 99357de14034..2ae82dc058c9 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -5304,6 +5304,23 @@ static void *svm_alloc_apic_backing_page(struct kvm_vcpu *vcpu)
return page_address(page);
}
+static struct kvm_plane *svm_alloc_plane(void)
+{
+ struct kvm_svm_plane *svm_plane = kzalloc(sizeof(*svm_plane), GFP_KERNEL_ACCOUNT);
+
+ if (svm_plane)
+ return &svm_plane->plane;
+
+ return NULL;
+}
+
+static void svm_free_plane(struct kvm_plane *plane)
+{
+ struct kvm_svm_plane *svm_plane = to_kvm_svm_plane(plane);
+
+ kfree(svm_plane);
+}
+
struct kvm_x86_ops svm_x86_ops __initdata = {
.name = KBUILD_MODNAME,
@@ -5446,8 +5463,8 @@ struct kvm_x86_ops svm_x86_ops __initdata = {
.gmem_invalidate = sev_gmem_invalidate,
.gmem_max_mapping_level = sev_gmem_max_mapping_level,
- .alloc_plane = x86_alloc_plane,
- .free_plane = x86_free_plane,
+ .alloc_plane = svm_alloc_plane,
+ .free_plane = svm_free_plane,
.max_planes = kvm_x86_default_max_planes,
};
diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 7d27ed7099a8..57033922ddcf 100644
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -110,7 +110,6 @@ struct kvm_sev_info {
unsigned long pages_locked; /* Number of pages locked */
struct list_head regions_list; /* List of registered regions */
u64 ap_jump_table; /* SEV-ES AP Jump Table address */
- u64 vmsa_features;
u16 ghcb_version; /* Highest guest GHCB protocol version allowed */
struct kvm *enc_context_owner; /* Owner of copied encryption context */
struct list_head mirror_vms; /* List of VMs mirroring */
@@ -140,6 +139,15 @@ struct kvm_svm {
#endif
};
+struct kvm_sev_info_plane {
+ u64 vmsa_features;
+};
+
+struct kvm_svm_plane {
+ struct kvm_plane plane;
+ struct kvm_sev_info_plane sev_info_plane;
+};
+
struct kvm_vcpu;
struct kvm_vmcb_info {
@@ -394,6 +402,16 @@ static __always_inline struct kvm_svm *to_kvm_svm(struct kvm *kvm)
return container_of(kvm, struct kvm_svm, kvm);
}
+static __always_inline struct kvm_svm_plane *to_kvm_svm_plane(struct kvm_plane *plane)
+{
+ return container_of(plane, struct kvm_svm_plane, plane);
+}
+
+static __always_inline struct kvm_sev_info_plane *to_kvm_sev_info_plane(struct kvm_plane *plane)
+{
+ return &to_kvm_svm_plane(plane)->sev_info_plane;
+}
+
#ifdef CONFIG_KVM_AMD_SEV
static __always_inline struct kvm_sev_info *to_kvm_sev_info(struct kvm *kvm)
{
@@ -413,7 +431,7 @@ static __always_inline bool ____sev_es_guest(struct kvm *kvm)
static __always_inline bool ____sev_snp_guest(struct kvm *kvm)
{
- struct kvm_sev_info *sev = to_kvm_sev_info(kvm);
+ struct kvm_sev_info_plane *sev = to_kvm_sev_info_plane(kvm->planes[0]);
return (sev->vmsa_features & SVM_SEV_FEAT_SNP_ACTIVE) &&
!WARN_ON_ONCE(!____sev_es_guest(kvm));
@@ -984,7 +1002,7 @@ void sev_snp_cancel_injection(struct kvm_vcpu *vcpu);
bool sev_snp_blocked(enum inject_type type, struct kvm_vcpu *vcpu);
static inline bool sev_snp_is_rinj_active(struct kvm_vcpu *vcpu)
{
- struct kvm_sev_info *sev = &to_kvm_svm(vcpu->kvm)->sev_info;
+ struct kvm_sev_info_plane *sev = &to_kvm_svm_plane(vcpu->plane)->sev_info_plane;
return is_sev_snp_guest(vcpu) &&
(sev->vmsa_features & SVM_SEV_FEAT_RESTRICTED_INJECTION);
--
2.53.0
^ permalink raw reply related
* [PATCH 53/60] kvm: x86: Introduce max_planes x86-op
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Paolo Bonzini <pbonzini@redhat.com>
Allow x86 hardware backends to overwrite the number of supported
planes per VM type.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Co-developed-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/kvm-x86-ops.h | 1 +
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/svm/svm.c | 1 +
arch/x86/kvm/vmx/main.c | 1 +
arch/x86/kvm/x86.c | 8 +++++++-
arch/x86/kvm/x86.h | 1 +
6 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/kvm-x86-ops.h b/arch/x86/include/asm/kvm-x86-ops.h
index 207d56d12459..4f96090c04c9 100644
--- a/arch/x86/include/asm/kvm-x86-ops.h
+++ b/arch/x86/include/asm/kvm-x86-ops.h
@@ -152,6 +152,7 @@ KVM_X86_OP_OPTIONAL_RET0(gmem_max_mapping_level)
KVM_X86_OP_OPTIONAL(gmem_invalidate)
KVM_X86_OP(alloc_plane)
KVM_X86_OP(free_plane)
+KVM_X86_OP(max_planes)
#endif
#undef KVM_X86_OP
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 1b7aa48c961e..bfa0188d372f 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -2016,6 +2016,8 @@ struct kvm_x86_ops {
struct kvm_plane *(*alloc_plane)(void);
void (*free_plane)(struct kvm_plane *);
+
+ unsigned (*max_planes)(struct kvm *);
};
struct kvm_x86_nested_ops {
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 2a92d8d18d7c..99357de14034 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -5448,6 +5448,7 @@ struct kvm_x86_ops svm_x86_ops __initdata = {
.alloc_plane = x86_alloc_plane,
.free_plane = x86_free_plane,
+ .max_planes = kvm_x86_default_max_planes,
};
/*
diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c
index a2fc4eeeca1d..572921bdfb32 100644
--- a/arch/x86/kvm/vmx/main.c
+++ b/arch/x86/kvm/vmx/main.c
@@ -1034,6 +1034,7 @@ struct kvm_x86_ops vt_x86_ops __initdata = {
.alloc_plane = x86_alloc_plane,
.free_plane = x86_free_plane,
+ .max_planes = kvm_x86_default_max_planes,
};
struct kvm_x86_init_ops vt_init_ops __initdata = {
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 60b34bd4da9d..c6910356b061 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -482,10 +482,16 @@ static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all_except_vmx) +
(KVM_LAST_EMULATED_VMX_MSR - KVM_FIRST_EMULATED_VMX_MSR + 1)];
static unsigned int num_msr_based_features;
-unsigned kvm_arch_max_planes(struct kvm *kvm)
+unsigned kvm_x86_default_max_planes(struct kvm *kvm)
{
return 1;
}
+EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_x86_default_max_planes);
+
+unsigned kvm_arch_max_planes(struct kvm *kvm)
+{
+ return kvm_x86_call(max_planes)(kvm);
+}
struct kvm_plane *x86_alloc_plane(void)
{
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index 812bd6004a4c..ff57ba568031 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -800,5 +800,6 @@ static inline bool kvm_is_valid_u_s_cet(struct kvm_vcpu *vcpu, u64 data)
struct kvm_plane *x86_alloc_plane(void);
void x86_free_plane(struct kvm_plane *plane);
+unsigned kvm_x86_default_max_planes(struct kvm *kvm);
#endif
--
2.53.0
^ permalink raw reply related
* [PATCH 50/60] kvm: x86: Make KVM_REQ_UPDATE_PROTECTED_GUEST_STATE per plane
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
The VMSAs are per plane, so this request must be too.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/kvm_host.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 0955097aca9c..0327b77e56b7 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -129,7 +129,7 @@
#define KVM_REQ_HV_TLB_FLUSH \
KVM_ARCH_REQ_FLAGS(32, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
#define KVM_REQ_UPDATE_PROTECTED_GUEST_STATE \
- KVM_ARCH_REQ_FLAGS(34, KVM_REQUEST_WAIT)
+ KVM_ARCH_REQ_FLAGS(34, KVM_REQUEST_WAIT | KVM_REQUEST_PER_PLANE)
#define CR0_RESERVED_BITS \
(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
--
2.53.0
^ permalink raw reply related
* [PATCH 52/60] kvm: x86: Switch to plane0 if it has events
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
When there are IRQs or events pending for plane0, make sure it can
handle it.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/x86.c | 34 +++++++++++++++++++++++++++++-----
1 file changed, 29 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 08fe65b8d57d..60b34bd4da9d 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -10962,6 +10962,20 @@ static int kvm_check_and_inject_events(struct kvm_vcpu *vcpu,
return r;
}
+static inline bool kvm_check_plane0_events(struct kvm_vcpu *vcpu)
+{
+ struct kvm_vcpu *vcpu_plane0;
+
+ if (vcpu->plane_level == 0)
+ return false;
+
+ vcpu_plane0 = vcpu->common->vcpus[0];
+
+ return kvm_cpu_has_injectable_intr(vcpu_plane0) ||
+ vcpu_plane0->arch.nmi_pending ||
+ vcpu_plane0->arch.smi_pending;
+}
+
static void process_nmi(struct kvm_vcpu *vcpu)
{
unsigned int limit;
@@ -11410,12 +11424,19 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
goto out;
}
}
+ }
- if (kvm_check_request(KVM_REQ_PLANE_RESCHED, vcpu)) {
- vcpu->common->plane_switch = true;
- r = 0;
- goto out;
- }
+ if (kvm_check_plane0_events(vcpu)) {
+ kvm_vcpu_set_plane_runnable(vcpu->common->vcpus[0]);
+
+ kvm_make_request(KVM_REQ_EVENT, vcpu);
+ kvm_make_request(KVM_REQ_PLANE_RESCHED, vcpu);
+ }
+
+ if (kvm_check_request(KVM_REQ_PLANE_RESCHED, vcpu)) {
+ vcpu->common->plane_switch = true;
+ r = 0;
+ goto out;
}
if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
@@ -11737,6 +11758,9 @@ bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
if (kvm_test_request(KVM_REQ_UPDATE_PROTECTED_GUEST_STATE, vcpu))
return true;
+ if (kvm_test_request(KVM_REQ_PLANE_RESCHED, vcpu))
+ return true;
+
if (kvm_arch_interrupt_allowed(vcpu) && kvm_cpu_has_interrupt(vcpu))
return true;
--
2.53.0
^ permalink raw reply related
* [PATCH 51/60] kvm: x86: Share pio_data across planes
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
The vcpu->arch.pio_data pointer is memory mapped to user-space
alongside the kvm_run page. So it also needs to be common across all
planes for a given VCPU index.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/x86.c | 20 +++++++++++---------
virt/kvm/kvm_main.c | 2 +-
3 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 0327b77e56b7..1b7aa48c961e 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -801,6 +801,8 @@ struct kvm_vcpu_arch_common {
bool cpuid_dynamic_bits_dirty;
bool is_amd_compatible;
+ void *pio_data;
+
/*
* cpu_caps holds the effective guest capabilities, i.e. the features
* the vCPU is allowed to use. Typically, but not always, features can
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 5f48392d4738..08fe65b8d57d 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -8532,7 +8532,7 @@ static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
}
static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
- unsigned short port, void *val, unsigned int count)
+ unsigned short port, void *val, unsigned int count)
{
int r = emulator_pio_in_out(vcpu, size, port, val, count, true);
if (r)
@@ -12936,7 +12936,6 @@ int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
{
- struct page *page;
int r;
vcpu->arch.last_vmentry_cpu = -1;
@@ -12960,10 +12959,7 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
r = -ENOMEM;
- page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
- if (!page)
- goto fail_free_lapic;
- vcpu->arch.pio_data = page_address(page);
+ vcpu->arch.pio_data = vcpu->common->arch.pio_data;
vcpu->arch.mce_banks = kcalloc(KVM_MAX_MCE_BANKS * 4, sizeof(u64),
GFP_KERNEL_ACCOUNT);
@@ -13023,8 +13019,6 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
fail_free_mce_banks:
kfree(vcpu->arch.mce_banks);
kfree(vcpu->arch.mci_ctl2_banks);
- free_page((unsigned long)vcpu->arch.pio_data);
-fail_free_lapic:
kvm_free_lapic(vcpu);
fail_mmu_destroy:
kvm_mmu_destroy(vcpu);
@@ -13072,16 +13066,24 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
idx = srcu_read_lock(&vcpu->kvm->srcu);
kvm_mmu_destroy(vcpu);
srcu_read_unlock(&vcpu->kvm->srcu, idx);
- free_page((unsigned long)vcpu->arch.pio_data);
}
int kvm_arch_vcpu_common_init(struct kvm_vcpu_common *common)
{
+ struct page *page;
+
+ page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
+ if (!page)
+ return -ENOMEM;
+
+ common->arch.pio_data = page_address(page);
+
return 0;
}
void kvm_arch_vcpu_common_destroy(struct kvm_vcpu_common *common)
{
+ free_page((unsigned long)common->arch.pio_data);
kvfree(common->arch.cpuid_entries);
}
diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
index a6d7601c3412..8f1a16af519a 100644
--- a/virt/kvm/kvm_main.c
+++ b/virt/kvm/kvm_main.c
@@ -4250,7 +4250,7 @@ static vm_fault_t kvm_vcpu_fault(struct vm_fault *vmf)
page = virt_to_page(vcpu->run);
#ifdef CONFIG_X86
else if (vmf->pgoff == KVM_PIO_PAGE_OFFSET)
- page = virt_to_page(vcpu->arch.pio_data);
+ page = virt_to_page(vcpu->common->arch.pio_data);
#endif
#ifdef CONFIG_KVM_MMIO
else if (vmf->pgoff == KVM_COALESCED_MMIO_PAGE_OFFSET)
--
2.53.0
^ permalink raw reply related
* [PATCH 49/60] kvm: x86: Allow hardware backend to overwrite struct kvm_plane allocation
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
Allow the hardware backend implementations to allocate the struct
kvm_plane instances so that they can carry hardware specific
information along them.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/kvm-x86-ops.h | 2 ++
arch/x86/include/asm/kvm_host.h | 3 +++
arch/x86/kvm/svm/svm.c | 3 +++
arch/x86/kvm/vmx/main.c | 5 ++++-
arch/x86/kvm/x86.c | 16 ++++++++++++++--
arch/x86/kvm/x86.h | 4 ++++
6 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/kvm-x86-ops.h b/arch/x86/include/asm/kvm-x86-ops.h
index c8bff1e9325e..207d56d12459 100644
--- a/arch/x86/include/asm/kvm-x86-ops.h
+++ b/arch/x86/include/asm/kvm-x86-ops.h
@@ -150,6 +150,8 @@ KVM_X86_OP_OPTIONAL(alloc_apic_backing_page)
KVM_X86_OP_OPTIONAL_RET0(gmem_prepare)
KVM_X86_OP_OPTIONAL_RET0(gmem_max_mapping_level)
KVM_X86_OP_OPTIONAL(gmem_invalidate)
+KVM_X86_OP(alloc_plane)
+KVM_X86_OP(free_plane)
#endif
#undef KVM_X86_OP
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index c2651774d785..0955097aca9c 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -2011,6 +2011,9 @@ struct kvm_x86_ops {
int (*gmem_prepare)(struct kvm *kvm, kvm_pfn_t pfn, gfn_t gfn, int max_order);
void (*gmem_invalidate)(kvm_pfn_t start, kvm_pfn_t end);
int (*gmem_max_mapping_level)(struct kvm *kvm, kvm_pfn_t pfn, bool is_private);
+
+ struct kvm_plane *(*alloc_plane)(void);
+ void (*free_plane)(struct kvm_plane *);
};
struct kvm_x86_nested_ops {
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 0b57dde29e40..2a92d8d18d7c 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -5445,6 +5445,9 @@ struct kvm_x86_ops svm_x86_ops __initdata = {
.gmem_prepare = sev_gmem_prepare,
.gmem_invalidate = sev_gmem_invalidate,
.gmem_max_mapping_level = sev_gmem_max_mapping_level,
+
+ .alloc_plane = x86_alloc_plane,
+ .free_plane = x86_free_plane,
};
/*
diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c
index f9c4703dda54..a2fc4eeeca1d 100644
--- a/arch/x86/kvm/vmx/main.c
+++ b/arch/x86/kvm/vmx/main.c
@@ -1030,7 +1030,10 @@ struct kvm_x86_ops vt_x86_ops __initdata = {
.vcpu_mem_enc_ioctl = vt_op_tdx_only(vcpu_mem_enc_ioctl),
.vcpu_mem_enc_unlocked_ioctl = vt_op_tdx_only(vcpu_mem_enc_unlocked_ioctl),
- .gmem_max_mapping_level = vt_op_tdx_only(gmem_max_mapping_level)
+ .gmem_max_mapping_level = vt_op_tdx_only(gmem_max_mapping_level),
+
+ .alloc_plane = x86_alloc_plane,
+ .free_plane = x86_free_plane,
};
struct kvm_x86_init_ops vt_init_ops __initdata = {
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index b9828cd31136..5f48392d4738 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -487,18 +487,30 @@ unsigned kvm_arch_max_planes(struct kvm *kvm)
return 1;
}
-struct kvm_plane *kvm_alloc_plane(void)
+struct kvm_plane *x86_alloc_plane(void)
{
/* For better type checking, do not return kzalloc() value directly */
struct kvm_plane *plane = kzalloc(sizeof(*plane), GFP_KERNEL_ACCOUNT);
return plane;
}
+EXPORT_SYMBOL_FOR_KVM_INTERNAL(x86_alloc_plane);
-void kvm_free_plane(struct kvm_plane *plane)
+void x86_free_plane(struct kvm_plane *plane)
{
kfree(plane);
}
+EXPORT_SYMBOL_FOR_KVM_INTERNAL(x86_free_plane);
+
+struct kvm_plane *kvm_alloc_plane(void)
+{
+ return kvm_x86_call(alloc_plane)();
+}
+
+void kvm_free_plane(struct kvm_plane *plane)
+{
+ kvm_x86_call(free_plane)(plane);
+}
/*
* All feature MSRs except uCode revID, which tracks the currently loaded uCode
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index 38a905fa86de..812bd6004a4c 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -797,4 +797,8 @@ static inline bool kvm_is_valid_u_s_cet(struct kvm_vcpu *vcpu, u64 data)
return true;
}
+
+struct kvm_plane *x86_alloc_plane(void);
+void x86_free_plane(struct kvm_plane *plane);
+
#endif
--
2.53.0
^ permalink raw reply related
* [PATCH 48/60] kvm: x86: Make event injection VCPU requests per-plane
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
These events must be handled on the plane-vcpu that they were raised
on.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/kvm_host.h | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index f30173093c44..c2651774d785 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -85,20 +85,20 @@
KVM_X86_NOTIFY_VMEXIT_USER)
/* x86-specific vcpu->requests bit members */
-#define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
+#define KVM_REQ_MIGRATE_TIMER KVM_ARCH_PLANE_REQ(0)
#define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
#define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
#define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
#define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
#define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
-#define KVM_REQ_EVENT KVM_ARCH_REQ(6)
+#define KVM_REQ_EVENT KVM_ARCH_PLANE_REQ(6)
#define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
#define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
-#define KVM_REQ_NMI KVM_ARCH_REQ(9)
-#define KVM_REQ_PMU KVM_ARCH_REQ(10)
-#define KVM_REQ_PMI KVM_ARCH_REQ(11)
+#define KVM_REQ_NMI KVM_ARCH_PLANE_REQ(9)
+#define KVM_REQ_PMU KVM_ARCH_PLANE_REQ(10)
+#define KVM_REQ_PMI KVM_ARCH_PLANE_REQ(11)
#ifdef CONFIG_KVM_SMM
-#define KVM_REQ_SMI KVM_ARCH_REQ(12)
+#define KVM_REQ_SMI KVM_ARCH_PLANE_REQ(12)
#endif
#define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
#define KVM_REQ_MCLOCK_INPROGRESS \
--
2.53.0
^ permalink raw reply related
* [PATCH 46/60] kvm: x86: Share MTRR state across planes
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
Share the MTRR state across all planes of a given VCPU index.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/kvm_host.h | 3 ++-
arch/x86/kvm/mtrr.c | 12 +++++++-----
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index b0d040528f9d..f30173093c44 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -817,6 +817,8 @@ struct kvm_vcpu_arch_common {
*/
u32 cpu_caps[NR_KVM_CPU_CAPS];
+ /* Cache configuration state */
+ struct kvm_mtrr mtrr_state;
};
int kvm_arch_vcpu_common_init(struct kvm_vcpu_common *common);
@@ -994,7 +996,6 @@ struct kvm_vcpu_arch {
bool smi_pending; /* SMI queued after currently running handler */
u8 handling_intr_from_guest;
- struct kvm_mtrr mtrr_state;
u64 pat;
unsigned switch_db_regs;
diff --git a/arch/x86/kvm/mtrr.c b/arch/x86/kvm/mtrr.c
index 6f74e2b27c1e..610ff975e022 100644
--- a/arch/x86/kvm/mtrr.c
+++ b/arch/x86/kvm/mtrr.c
@@ -23,18 +23,20 @@
static u64 *find_mtrr(struct kvm_vcpu *vcpu, unsigned int msr)
{
+ struct kvm_vcpu_common *common = vcpu->common;
+
int index;
switch (msr) {
case MTRRphysBase_MSR(0) ... MTRRphysMask_MSR(KVM_NR_VAR_MTRR - 1):
index = msr - MTRRphysBase_MSR(0);
- return &vcpu->arch.mtrr_state.var[index];
+ return &common->arch.mtrr_state.var[index];
case MSR_MTRRfix64K_00000:
- return &vcpu->arch.mtrr_state.fixed_64k;
+ return &common->arch.mtrr_state.fixed_64k;
case MSR_MTRRfix16K_80000:
case MSR_MTRRfix16K_A0000:
index = msr - MSR_MTRRfix16K_80000;
- return &vcpu->arch.mtrr_state.fixed_16k[index];
+ return &common->arch.mtrr_state.fixed_16k[index];
case MSR_MTRRfix4K_C0000:
case MSR_MTRRfix4K_C8000:
case MSR_MTRRfix4K_D0000:
@@ -44,9 +46,9 @@ static u64 *find_mtrr(struct kvm_vcpu *vcpu, unsigned int msr)
case MSR_MTRRfix4K_F0000:
case MSR_MTRRfix4K_F8000:
index = msr - MSR_MTRRfix4K_C0000;
- return &vcpu->arch.mtrr_state.fixed_4k[index];
+ return &common->arch.mtrr_state.fixed_4k[index];
case MSR_MTRRdefType:
- return &vcpu->arch.mtrr_state.deftype;
+ return &common->arch.mtrr_state.deftype;
default:
break;
}
--
2.53.0
^ permalink raw reply related
* [PATCH 47/60] kvm: x86: Select a plane to run
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
In the KVM_RUN path, select a runnable VCPU plane and use it to enter
the guest. Also handle KVM_REQ_PLANE_RESCHED events to switch planes
without exiting to user-space.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/x86.c | 29 ++++++++++++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 7e94a378b3d2..b9828cd31136 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -11398,6 +11398,12 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
goto out;
}
}
+
+ if (kvm_check_request(KVM_REQ_PLANE_RESCHED, vcpu)) {
+ vcpu->common->plane_switch = true;
+ r = 0;
+ goto out;
+ }
}
if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
@@ -12076,7 +12082,7 @@ static int kvm_x86_vcpu_pre_run(struct kvm_vcpu *vcpu)
return kvm_x86_call(vcpu_pre_run)(vcpu);
}
-int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
+static int __kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
{
struct kvm_queued_exception *ex = &vcpu->arch.exception;
struct kvm_run *kvm_run = vcpu->run;
@@ -12196,6 +12202,27 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
return r;
}
+int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu_plane0)
+{
+ struct kvm_vcpu_common *common = vcpu_plane0->common;
+ int ret;
+
+ do {
+ struct kvm_vcpu *vcpu = kvm_vcpu_select_plane(vcpu_plane0);
+
+ if (vcpu == NULL)
+ return -EINVAL;
+
+ common->plane_switch = false;
+
+ ret = __kvm_arch_vcpu_ioctl_run(vcpu);
+ if (ret)
+ break;
+ } while (vcpu_plane0->common->plane_switch);
+
+ return ret;
+}
+
static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
{
if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
--
2.53.0
^ permalink raw reply related
* [PATCH 43/60] kvm: x86: Move CPUID state to struct kvm_vcpu_arch_common
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
The CPUID state is shared across all planes, so move it to struct
kvm_vcpu_arch_common.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/kvm_host.h | 17 ++++++++--------
arch/x86/kvm/cpuid.c | 36 +++++++++++++++++++--------------
arch/x86/kvm/cpuid.h | 14 ++++++++++---
arch/x86/kvm/lapic.c | 2 +-
arch/x86/kvm/smm.c | 2 +-
arch/x86/kvm/svm/svm.c | 2 +-
arch/x86/kvm/vmx/vmx.c | 2 +-
arch/x86/kvm/x86.c | 17 ++++++++++++----
8 files changed, 58 insertions(+), 34 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 11e52f8bb2c2..3a64bdae6e23 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -794,10 +794,16 @@ enum kvm_only_cpuid_leafs {
NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
};
-struct kvm_vcpu_arch_common {};
+struct kvm_vcpu_arch_common {
+ /* CPUID related state */
+ int cpuid_nent;
+ struct kvm_cpuid_entry2 *cpuid_entries;
+ bool cpuid_dynamic_bits_dirty;
+ bool is_amd_compatible;
+};
-static inline int kvm_arch_vcpu_common_init(struct kvm_vcpu_common *common) { return 0; }
-static inline void kvm_arch_vcpu_common_destroy(struct kvm_vcpu_common *common) {}
+int kvm_arch_vcpu_common_init(struct kvm_vcpu_common *common);
+void kvm_arch_vcpu_common_destroy(struct kvm_vcpu_common *common);
struct kvm_vcpu_arch {
/*
@@ -919,11 +925,6 @@ struct kvm_vcpu_arch {
int halt_request; /* real mode on Intel only */
- int cpuid_nent;
- struct kvm_cpuid_entry2 *cpuid_entries;
- bool cpuid_dynamic_bits_dirty;
- bool is_amd_compatible;
-
/*
* cpu_caps holds the effective guest capabilities, i.e. the features
* the vCPU is allowed to use. Typically, but not always, features can
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index e69156b54cff..6d948d63306c 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -176,6 +176,7 @@ static void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu);
static int kvm_cpuid_check_equal(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
int nent)
{
+ struct kvm_vcpu_common *common = vcpu->common;
struct kvm_cpuid_entry2 *orig;
int i;
@@ -188,11 +189,11 @@ static int kvm_cpuid_check_equal(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2
kvm_update_cpuid_runtime(vcpu);
kvm_apply_cpuid_pv_features_quirk(vcpu);
- if (nent != vcpu->arch.cpuid_nent)
+ if (nent != common->arch.cpuid_nent)
return -EINVAL;
for (i = 0; i < nent; i++) {
- orig = &vcpu->arch.cpuid_entries[i];
+ orig = &common->arch.cpuid_entries[i];
if (e2[i].function != orig->function ||
e2[i].index != orig->index ||
e2[i].flags != orig->flags ||
@@ -290,7 +291,7 @@ static void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu)
{
struct kvm_cpuid_entry2 *best;
- vcpu->arch.cpuid_dynamic_bits_dirty = false;
+ vcpu->common->arch.cpuid_dynamic_bits_dirty = false;
best = kvm_find_cpuid_entry(vcpu, 1);
if (best) {
@@ -374,6 +375,7 @@ static int cpuid_func_emulated(struct kvm_cpuid_entry2 *entry, u32 func,
void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
{
+ struct kvm_vcpu_common *common = vcpu->common;
struct kvm_lapic *apic = vcpu->arch.apic;
struct kvm_cpuid_entry2 *best;
struct kvm_cpuid_entry2 *entry;
@@ -443,7 +445,7 @@ void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
vcpu->arch.pv_cpuid.features = kvm_apply_cpuid_pv_features_quirk(vcpu);
- vcpu->arch.is_amd_compatible = guest_cpuid_is_amd_or_hygon(vcpu);
+ common->arch.is_amd_compatible = guest_cpuid_is_amd_or_hygon(vcpu);
vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
@@ -509,6 +511,7 @@ u64 kvm_vcpu_reserved_gpa_bits_raw(struct kvm_vcpu *vcpu)
static int kvm_set_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
int nent)
{
+ struct kvm_vcpu_common *common = vcpu->common;
u32 vcpu_caps[NR_KVM_CPU_CAPS];
int r;
@@ -516,7 +519,7 @@ static int kvm_set_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
* Apply pending runtime CPUID updates to the current CPUID entries to
* avoid false positives due to mismatches on KVM-owned feature flags.
*/
- if (vcpu->arch.cpuid_dynamic_bits_dirty)
+ if (common->arch.cpuid_dynamic_bits_dirty)
kvm_update_cpuid_runtime(vcpu);
/*
@@ -530,8 +533,8 @@ static int kvm_set_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
* updates. Full initialization is done if and only if the vCPU hasn't
* run, i.e. only if userspace is potentially changing CPUID features.
*/
- swap(vcpu->arch.cpuid_entries, e2);
- swap(vcpu->arch.cpuid_nent, nent);
+ swap(common->arch.cpuid_entries, e2);
+ swap(common->arch.cpuid_nent, nent);
memcpy(vcpu_caps, vcpu->arch.cpu_caps, sizeof(vcpu_caps));
BUILD_BUG_ON(sizeof(vcpu_caps) != sizeof(vcpu->arch.cpu_caps));
@@ -580,8 +583,8 @@ static int kvm_set_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
err:
memcpy(vcpu->arch.cpu_caps, vcpu_caps, sizeof(vcpu_caps));
- swap(vcpu->arch.cpuid_entries, e2);
- swap(vcpu->arch.cpuid_nent, nent);
+ swap(common->arch.cpuid_entries, e2);
+ swap(common->arch.cpuid_nent, nent);
return r;
}
@@ -658,17 +661,19 @@ int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
struct kvm_cpuid2 *cpuid,
struct kvm_cpuid_entry2 __user *entries)
{
- if (cpuid->nent < vcpu->arch.cpuid_nent)
+ struct kvm_vcpu_common *common = vcpu->common;
+
+ if (cpuid->nent < common->arch.cpuid_nent)
return -E2BIG;
- if (vcpu->arch.cpuid_dynamic_bits_dirty)
+ if (common->arch.cpuid_dynamic_bits_dirty)
kvm_update_cpuid_runtime(vcpu);
- if (copy_to_user(entries, vcpu->arch.cpuid_entries,
- vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
+ if (copy_to_user(entries, common->arch.cpuid_entries,
+ common->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
return -EFAULT;
- cpuid->nent = vcpu->arch.cpuid_nent;
+ cpuid->nent = common->arch.cpuid_nent;
return 0;
}
@@ -2089,10 +2094,11 @@ bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
u32 *ecx, u32 *edx, bool exact_only)
{
u32 orig_function = *eax, function = *eax, index = *ecx;
+ struct kvm_vcpu_common *common = vcpu->common;
struct kvm_cpuid_entry2 *entry;
bool exact, used_max_basic = false;
- if (vcpu->arch.cpuid_dynamic_bits_dirty)
+ if (common->arch.cpuid_dynamic_bits_dirty)
kvm_update_cpuid_runtime(vcpu);
entry = kvm_find_cpuid_entry_index(vcpu, function, index);
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index 039b8e6f40ba..143ea8531611 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -36,14 +36,18 @@ struct kvm_cpuid_entry2 *kvm_find_cpuid_entry2(struct kvm_cpuid_entry2 *entries,
static inline struct kvm_cpuid_entry2 *kvm_find_cpuid_entry_index(struct kvm_vcpu *vcpu,
u32 function, u32 index)
{
- return kvm_find_cpuid_entry2(vcpu->arch.cpuid_entries, vcpu->arch.cpuid_nent,
+ struct kvm_vcpu_common *common = vcpu->common;
+
+ return kvm_find_cpuid_entry2(common->arch.cpuid_entries, common->arch.cpuid_nent,
function, index);
}
static inline struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
u32 function)
{
- return kvm_find_cpuid_entry2(vcpu->arch.cpuid_entries, vcpu->arch.cpuid_nent,
+ struct kvm_vcpu_common *common = vcpu->common;
+
+ return kvm_find_cpuid_entry2(common->arch.cpuid_entries, common->arch.cpuid_nent,
function, KVM_CPUID_INDEX_NOT_SIGNIFICANT);
}
@@ -135,7 +139,7 @@ static __always_inline bool guest_cpuid_has(struct kvm_vcpu *vcpu,
static inline bool guest_cpuid_is_amd_compatible(struct kvm_vcpu *vcpu)
{
- return vcpu->arch.is_amd_compatible;
+ return vcpu->common->arch.is_amd_compatible;
}
static inline bool guest_cpuid_is_intel_compatible(struct kvm_vcpu *vcpu)
@@ -300,4 +304,8 @@ static inline bool guest_has_pred_cmd_msr(struct kvm_vcpu *vcpu)
guest_cpu_cap_has(vcpu, X86_FEATURE_SBPB));
}
+static inline void cpuid_set_dirty(struct kvm_vcpu *vcpu)
+{
+ vcpu->common->arch.cpuid_dynamic_bits_dirty = true;
+}
#endif
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index cac076445472..dc7a08831a54 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -2754,7 +2754,7 @@ static void __kvm_apic_set_base(struct kvm_vcpu *vcpu, u64 value)
vcpu->arch.apic_base = value;
if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE)
- vcpu->arch.cpuid_dynamic_bits_dirty = true;
+ cpuid_set_dirty(vcpu);
if (!apic)
return;
diff --git a/arch/x86/kvm/smm.c b/arch/x86/kvm/smm.c
index f623c5986119..736ab345b9fd 100644
--- a/arch/x86/kvm/smm.c
+++ b/arch/x86/kvm/smm.c
@@ -363,7 +363,7 @@ void enter_smm(struct kvm_vcpu *vcpu)
goto error;
#endif
- vcpu->arch.cpuid_dynamic_bits_dirty = true;
+ cpuid_set_dirty(vcpu);
kvm_mmu_reset_context(vcpu);
return;
error:
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index e8ad880a4266..612db7ad8b2a 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -1848,7 +1848,7 @@ void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
vmcb_mark_dirty(to_svm(vcpu)->vmcb, VMCB_CR);
if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
- vcpu->arch.cpuid_dynamic_bits_dirty = true;
+ cpuid_set_dirty(vcpu);
}
static void svm_set_segment(struct kvm_vcpu *vcpu,
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 20262855bfe8..62e180651143 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -3595,7 +3595,7 @@ void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
vmcs_writel(GUEST_CR4, hw_cr4);
if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
- vcpu->arch.cpuid_dynamic_bits_dirty = true;
+ cpuid_set_dirty(vcpu);
}
void vmx_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 7fc08df245bd..7e94a378b3d2 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1322,7 +1322,7 @@ int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
vcpu->arch.xcr0 = xcr0;
if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
- vcpu->arch.cpuid_dynamic_bits_dirty = true;
+ cpuid_set_dirty(vcpu);
return 0;
}
EXPORT_SYMBOL_FOR_KVM_INTERNAL(__kvm_set_xcr);
@@ -4089,7 +4089,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
if (!guest_cpu_cap_has(vcpu, X86_FEATURE_XMM3))
return 1;
vcpu->arch.ia32_misc_enable_msr = data;
- vcpu->arch.cpuid_dynamic_bits_dirty = true;
+ cpuid_set_dirty(vcpu);
} else {
vcpu->arch.ia32_misc_enable_msr = data;
}
@@ -4121,7 +4121,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
if (vcpu->arch.ia32_xss == data)
break;
vcpu->arch.ia32_xss = data;
- vcpu->arch.cpuid_dynamic_bits_dirty = true;
+ cpuid_set_dirty(vcpu);
break;
case MSR_SMI_COUNT:
if (!msr_info->host_initiated)
@@ -13034,7 +13034,16 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
kvm_mmu_destroy(vcpu);
srcu_read_unlock(&vcpu->kvm->srcu, idx);
free_page((unsigned long)vcpu->arch.pio_data);
- kvfree(vcpu->arch.cpuid_entries);
+}
+
+int kvm_arch_vcpu_common_init(struct kvm_vcpu_common *common)
+{
+ return 0;
+}
+
+void kvm_arch_vcpu_common_destroy(struct kvm_vcpu_common *common)
+{
+ kvfree(common->arch.cpuid_entries);
}
static void kvm_xstate_reset(struct kvm_vcpu *vcpu, bool init_event)
--
2.53.0
^ permalink raw reply related
* [PATCH 42/60] kvm: x86: Make local APIC code aware of planes
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Paolo Bonzini <pbonzini@redhat.com>
Make the local apic code aware of planes and only operate on APICs
within the same plane level.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Co-developed-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/kvm/hyperv.c | 2 +-
arch/x86/kvm/ioapic.c | 8 +++----
arch/x86/kvm/irq.c | 8 ++++---
arch/x86/kvm/lapic.c | 50 +++++++++++++++++++++----------------------
arch/x86/kvm/lapic.h | 12 +++++------
arch/x86/kvm/x86.c | 6 +++---
arch/x86/kvm/xen.c | 2 +-
7 files changed, 45 insertions(+), 43 deletions(-)
diff --git a/arch/x86/kvm/hyperv.c b/arch/x86/kvm/hyperv.c
index 4438ecac9a89..0a5d8e302f32 100644
--- a/arch/x86/kvm/hyperv.c
+++ b/arch/x86/kvm/hyperv.c
@@ -492,7 +492,7 @@ static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint)
irq.vector = vector;
irq.level = 1;
- ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq);
+ ret = kvm_irq_delivery_to_apic(vcpu->plane, vcpu->arch.apic, &irq);
trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret);
return ret;
}
diff --git a/arch/x86/kvm/ioapic.c b/arch/x86/kvm/ioapic.c
index eed96ff6e722..539edee73047 100644
--- a/arch/x86/kvm/ioapic.c
+++ b/arch/x86/kvm/ioapic.c
@@ -429,7 +429,7 @@ static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
irq.dest_id = e->fields.dest_id;
irq.msi_redir_hint = false;
bitmap_zero(vcpu_bitmap, KVM_MAX_VCPUS);
- kvm_bitmap_or_dest_vcpus(ioapic->kvm, &irq,
+ kvm_bitmap_or_dest_vcpus(ioapic->kvm->planes[0], &irq,
vcpu_bitmap);
if (old_dest_mode != e->fields.dest_mode ||
old_dest_id != e->fields.dest_id) {
@@ -442,7 +442,7 @@ static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
irq.dest_mode =
kvm_lapic_irq_dest_mode(
!!e->fields.dest_mode);
- kvm_bitmap_or_dest_vcpus(ioapic->kvm, &irq,
+ kvm_bitmap_or_dest_vcpus(ioapic->kvm->planes[0], &irq,
vcpu_bitmap);
}
kvm_make_scan_ioapic_request_mask(ioapic->kvm,
@@ -485,11 +485,11 @@ static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
* if rtc_irq_check_coalesced returns false).
*/
BUG_ON(ioapic->rtc_status.pending_eoi != 0);
- ret = __kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
+ ret = __kvm_irq_delivery_to_apic(ioapic->kvm->planes[0], NULL, &irqe,
&ioapic->rtc_status);
ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
} else
- ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe);
+ ret = kvm_irq_delivery_to_apic(ioapic->kvm->planes[0], NULL, &irqe);
if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
entry->fields.remote_irr = 1;
diff --git a/arch/x86/kvm/irq.c b/arch/x86/kvm/irq.c
index bc748a4b7cbd..3bf2ecfd9cb4 100644
--- a/arch/x86/kvm/irq.c
+++ b/arch/x86/kvm/irq.c
@@ -226,6 +226,7 @@ int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
struct kvm *kvm, int irq_source_id, int level, bool line_status)
{
struct kvm_lapic_irq irq;
+ struct kvm_plane *plane;
if (kvm_msi_route_invalid(kvm, e))
return -EINVAL;
@@ -234,8 +235,9 @@ int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
return -1;
kvm_msi_to_lapic_irq(kvm, e, &irq);
+ plane = kvm->planes[e->msi.plane_level];
- return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
+ return kvm_irq_delivery_to_apic(plane, NULL, &irq);
}
int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
@@ -258,7 +260,7 @@ int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
kvm_msi_to_lapic_irq(kvm, e, &irq);
- if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r))
+ if (kvm_irq_delivery_to_apic_fast(kvm->planes[e->msi.plane_level], NULL, &irq, &r))
return r;
break;
@@ -453,7 +455,7 @@ static int kvm_pi_update_irte(struct kvm_kernel_irqfd *irqfd,
* if they have a single CPU as the destination, e.g. only if
* the guest has affined the interrupt to a single vCPU.
*/
- if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) ||
+ if (!kvm_intr_is_single_vcpu(kvm->planes[0], &irq, &vcpu) ||
!kvm_irq_is_postable(&irq))
vcpu = NULL;
}
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 06a12b49fafa..cac076445472 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1153,7 +1153,7 @@ static int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2)
* means that the interrupt should be dropped. In this case, *bitmap would be
* zero and *dst undefined.
*/
-static inline bool kvm_apic_map_get_dest_lapic(struct kvm *kvm,
+static inline bool kvm_apic_map_get_dest_lapic(struct kvm_plane *plane,
struct kvm_lapic **src, struct kvm_lapic_irq *irq,
struct kvm_apic_map *map, struct kvm_lapic ***dst,
unsigned long *bitmap)
@@ -1167,7 +1167,7 @@ static inline bool kvm_apic_map_get_dest_lapic(struct kvm *kvm,
} else if (irq->shorthand)
return false;
- if (!map || kvm_apic_is_broadcast_dest(kvm, src, irq, map))
+ if (!map || kvm_apic_is_broadcast_dest(plane->kvm, src, irq, map))
return false;
if (irq->dest_mode == APIC_DEST_PHYSICAL) {
@@ -1208,7 +1208,7 @@ static inline bool kvm_apic_map_get_dest_lapic(struct kvm *kvm,
bitmap, 16);
if (!(*dst)[lowest]) {
- kvm_apic_disabled_lapic_found(kvm);
+ kvm_apic_disabled_lapic_found(plane->kvm);
*bitmap = 0;
return true;
}
@@ -1219,7 +1219,7 @@ static inline bool kvm_apic_map_get_dest_lapic(struct kvm *kvm,
return true;
}
-static bool __kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
+static bool __kvm_irq_delivery_to_apic_fast(struct kvm_plane *plane, struct kvm_lapic *src,
struct kvm_lapic_irq *irq, int *r,
struct rtc_status *rtc_status)
{
@@ -1232,7 +1232,7 @@ static bool __kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *s
*r = -1;
if (irq->shorthand == APIC_DEST_SELF) {
- if (KVM_BUG_ON(!src, kvm)) {
+ if (KVM_BUG_ON(!src, plane->kvm)) {
*r = 0;
return true;
}
@@ -1241,9 +1241,9 @@ static bool __kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *s
}
rcu_read_lock();
- map = rcu_dereference(kvm->planes[0]->arch.apic_map);
+ map = rcu_dereference(plane->arch.apic_map);
- ret = kvm_apic_map_get_dest_lapic(kvm, &src, irq, map, &dst, &bitmap);
+ ret = kvm_apic_map_get_dest_lapic(plane, &src, irq, map, &dst, &bitmap);
if (ret) {
*r = 0;
for_each_set_bit(i, &bitmap, 16) {
@@ -1258,10 +1258,10 @@ static bool __kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *s
}
-bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
+bool kvm_irq_delivery_to_apic_fast(struct kvm_plane *plane, struct kvm_lapic *src,
struct kvm_lapic_irq *irq, int *r)
{
- return __kvm_irq_delivery_to_apic_fast(kvm, src, irq, r, NULL);
+ return __kvm_irq_delivery_to_apic_fast(plane, src, irq, r, NULL);
}
/*
@@ -1278,7 +1278,7 @@ bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
* interrupt.
* - Otherwise, use remapped mode to inject the interrupt.
*/
-static bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm,
+static bool kvm_intr_is_single_vcpu_fast(struct kvm_plane *plane,
struct kvm_lapic_irq *irq,
struct kvm_vcpu **dest_vcpu)
{
@@ -1291,9 +1291,9 @@ static bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm,
return false;
rcu_read_lock();
- map = rcu_dereference(kvm->planes[0]->arch.apic_map);
+ map = rcu_dereference(plane->arch.apic_map);
- if (kvm_apic_map_get_dest_lapic(kvm, NULL, irq, map, &dst, &bitmap) &&
+ if (kvm_apic_map_get_dest_lapic(plane, NULL, irq, map, &dst, &bitmap) &&
hweight16(bitmap) == 1) {
unsigned long i = find_first_bit(&bitmap, 16);
@@ -1307,17 +1307,17 @@ static bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm,
return ret;
}
-bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
+bool kvm_intr_is_single_vcpu(struct kvm_plane *plane, struct kvm_lapic_irq *irq,
struct kvm_vcpu **dest_vcpu)
{
int r = 0;
unsigned long i;
struct kvm_vcpu *vcpu;
- if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
+ if (kvm_intr_is_single_vcpu_fast(plane, irq, dest_vcpu))
return true;
- kvm_for_each_vcpu(i, vcpu, kvm) {
+ plane_for_each_vcpu(i, vcpu, plane) {
if (!kvm_apic_present(vcpu))
continue;
@@ -1335,7 +1335,7 @@ bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
}
EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_intr_is_single_vcpu);
-int __kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
+int __kvm_irq_delivery_to_apic(struct kvm_plane *plane, struct kvm_lapic *src,
struct kvm_lapic_irq *irq,
struct rtc_status *rtc_status)
{
@@ -1344,7 +1344,7 @@ int __kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
unsigned long i, dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
unsigned int dest_vcpus = 0;
- if (__kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, rtc_status))
+ if (__kvm_irq_delivery_to_apic_fast(plane, src, irq, &r, rtc_status))
return r;
if (irq->dest_mode == APIC_DEST_PHYSICAL &&
@@ -1355,7 +1355,7 @@ int __kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
- kvm_for_each_vcpu(i, vcpu, kvm) {
+ plane_for_each_vcpu(i, vcpu, plane) {
if (!kvm_apic_present(vcpu))
continue;
@@ -1384,7 +1384,7 @@ int __kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
dest_vcpu_bitmap, KVM_MAX_VCPUS);
- lowest = kvm_get_vcpu(kvm, idx);
+ lowest = plane_get_vcpu(plane, idx);
}
if (lowest)
@@ -1500,7 +1500,7 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
* out the destination vcpus array and set the bitmap or it traverses to
* each available vcpu to identify the same.
*/
-void kvm_bitmap_or_dest_vcpus(struct kvm *kvm, struct kvm_lapic_irq *irq,
+void kvm_bitmap_or_dest_vcpus(struct kvm_plane *plane, struct kvm_lapic_irq *irq,
unsigned long *vcpu_bitmap)
{
struct kvm_lapic **dest_vcpu = NULL;
@@ -1512,9 +1512,9 @@ void kvm_bitmap_or_dest_vcpus(struct kvm *kvm, struct kvm_lapic_irq *irq,
bool ret;
rcu_read_lock();
- map = rcu_dereference(kvm->planes[0]->arch.apic_map);
+ map = rcu_dereference(plane->arch.apic_map);
- ret = kvm_apic_map_get_dest_lapic(kvm, &src, irq, map, &dest_vcpu,
+ ret = kvm_apic_map_get_dest_lapic(plane, &src, irq, map, &dest_vcpu,
&bitmap);
if (ret) {
for_each_set_bit(i, &bitmap, 16) {
@@ -1524,7 +1524,7 @@ void kvm_bitmap_or_dest_vcpus(struct kvm *kvm, struct kvm_lapic_irq *irq,
__set_bit(vcpu_idx, vcpu_bitmap);
}
} else {
- kvm_for_each_vcpu(i, vcpu, kvm) {
+ plane_for_each_vcpu(i, vcpu, plane) {
if (!kvm_apic_present(vcpu))
continue;
if (!kvm_apic_match_dest(vcpu, NULL,
@@ -1651,7 +1651,7 @@ void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high)
trace_kvm_apic_ipi(icr_low, irq.dest_id);
- kvm_irq_delivery_to_apic(apic->vcpu->kvm, apic, &irq);
+ kvm_irq_delivery_to_apic(apic->vcpu->plane, apic, &irq);
}
EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_apic_send_ipi);
@@ -2619,7 +2619,7 @@ static int __kvm_x2apic_icr_write(struct kvm_lapic *apic, u64 data, bool fast)
kvm_icr_to_lapic_irq(apic, (u32)data, (u32)(data >> 32), &irq);
- if (!kvm_irq_delivery_to_apic_fast(apic->vcpu->kvm, apic, &irq,
+ if (!kvm_irq_delivery_to_apic_fast(apic->vcpu->plane, apic, &irq,
&ignored))
return -EWOULDBLOCK;
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index afd440c88981..a9ede0e145d9 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -116,17 +116,17 @@ void kvm_apic_update_apicv(struct kvm_vcpu *vcpu);
int kvm_alloc_apic_access_page(struct kvm *kvm);
void kvm_inhibit_apic_access_page(struct kvm_vcpu *vcpu);
-bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
+bool kvm_irq_delivery_to_apic_fast(struct kvm_plane *plane, struct kvm_lapic *src,
struct kvm_lapic_irq *irq, int *r);
-int __kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
+int __kvm_irq_delivery_to_apic(struct kvm_plane *plane, struct kvm_lapic *src,
struct kvm_lapic_irq *irq,
struct rtc_status *rtc_status);
-static inline int kvm_irq_delivery_to_apic(struct kvm *kvm,
+static inline int kvm_irq_delivery_to_apic(struct kvm_plane *plane,
struct kvm_lapic *src,
struct kvm_lapic_irq *irq)
{
- return __kvm_irq_delivery_to_apic(kvm, src, irq, NULL);
+ return __kvm_irq_delivery_to_apic(plane, src, irq, NULL);
}
void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high);
@@ -244,10 +244,10 @@ bool kvm_lapic_suppress_eoi_broadcast(struct kvm_lapic *apic);
void kvm_wait_lapic_expire(struct kvm_vcpu *vcpu);
-void kvm_bitmap_or_dest_vcpus(struct kvm *kvm, struct kvm_lapic_irq *irq,
+void kvm_bitmap_or_dest_vcpus(struct kvm_plane *plane, struct kvm_lapic_irq *irq,
unsigned long *vcpu_bitmap);
-bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
+bool kvm_intr_is_single_vcpu(struct kvm_plane *plane, struct kvm_lapic_irq *irq,
struct kvm_vcpu **dest_vcpu);
void kvm_lapic_switch_to_sw_timer(struct kvm_vcpu *vcpu);
void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu *vcpu);
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 070f87ae23eb..7fc08df245bd 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -10373,7 +10373,7 @@ static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
*
* @apicid - apicid of vcpu to be kicked.
*/
-static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
+static void kvm_pv_kick_cpu_op(struct kvm_plane *plane, int apicid)
{
/*
* All other fields are unused for APIC_DM_REMRD, but may be consumed by
@@ -10386,7 +10386,7 @@ static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
.dest_id = apicid,
};
- kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq);
+ kvm_irq_delivery_to_apic(plane, NULL, &lapic_irq);
}
bool kvm_apicv_activated(struct kvm *kvm)
@@ -10515,7 +10515,7 @@ int ____kvm_emulate_hypercall(struct kvm_vcpu *vcpu, int cpl,
if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
break;
- kvm_pv_kick_cpu_op(vcpu->kvm, a1);
+ kvm_pv_kick_cpu_op(vcpu->plane, a1);
kvm_sched_yield(vcpu, a1);
ret = 0;
break;
diff --git a/arch/x86/kvm/xen.c b/arch/x86/kvm/xen.c
index 91fd3673c09a..06c5789f406b 100644
--- a/arch/x86/kvm/xen.c
+++ b/arch/x86/kvm/xen.c
@@ -626,7 +626,7 @@ void kvm_xen_inject_vcpu_vector(struct kvm_vcpu *v)
irq.delivery_mode = APIC_DM_FIXED;
irq.level = 1;
- kvm_irq_delivery_to_apic(v->kvm, NULL, &irq);
+ kvm_irq_delivery_to_apic(v->plane, NULL, &irq);
}
/*
--
2.53.0
^ permalink raw reply related
* [PATCH 44/60] kvm: x86: Move cpu_caps to struct kvm_vcpu_arch_common
From: Jörg Rödel @ 2026-06-08 14:42 UTC (permalink / raw)
To: Paolo Bonzini, Sean Christopherson
Cc: Tom Lendacky, ashish.kalra, michael.roth, nsaenz, anelkz,
James.Bottomley, Melody Wang, kvm, linux-kernel, kvmarm,
loongarch, linux-mips, linuxppc-dev, kvm-riscv, x86, coconut-svsm,
joerg.roedel
In-Reply-To: <20260608144252.351443-1-joro@8bytes.org>
From: Joerg Roedel <joerg.roedel@amd.com>
Now that CPUID state is shared across all planes, cpu_caps can be
shared as well.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/kvm_host.h | 33 +++++++++++++++++----------------
arch/x86/kvm/cpuid.c | 18 +++++++++---------
arch/x86/kvm/cpuid.h | 17 +++++++++--------
arch/x86/kvm/svm/svm.c | 4 ++--
arch/x86/kvm/vmx/vmx.c | 2 +-
5 files changed, 38 insertions(+), 36 deletions(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 3a64bdae6e23..b0d040528f9d 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -800,6 +800,23 @@ struct kvm_vcpu_arch_common {
struct kvm_cpuid_entry2 *cpuid_entries;
bool cpuid_dynamic_bits_dirty;
bool is_amd_compatible;
+
+ /*
+ * cpu_caps holds the effective guest capabilities, i.e. the features
+ * the vCPU is allowed to use. Typically, but not always, features can
+ * be used by the guest if and only if both KVM and userspace want to
+ * expose the feature to the guest.
+ *
+ * A common exception is for virtualization holes, i.e. when KVM can't
+ * prevent the guest from using a feature, in which case the vCPU "has"
+ * the feature regardless of what KVM or userspace desires.
+ *
+ * Note, features that don't require KVM involvement in any way are
+ * NOT enforced/sanitized by KVM, i.e. are taken verbatim from the
+ * guest CPUID provided by userspace.
+ */
+ u32 cpu_caps[NR_KVM_CPU_CAPS];
+
};
int kvm_arch_vcpu_common_init(struct kvm_vcpu_common *common);
@@ -925,22 +942,6 @@ struct kvm_vcpu_arch {
int halt_request; /* real mode on Intel only */
- /*
- * cpu_caps holds the effective guest capabilities, i.e. the features
- * the vCPU is allowed to use. Typically, but not always, features can
- * be used by the guest if and only if both KVM and userspace want to
- * expose the feature to the guest.
- *
- * A common exception is for virtualization holes, i.e. when KVM can't
- * prevent the guest from using a feature, in which case the vCPU "has"
- * the feature regardless of what KVM or userspace desires.
- *
- * Note, features that don't require KVM involvement in any way are
- * NOT enforced/sanitized by KVM, i.e. are taken verbatim from the
- * guest CPUID provided by userspace.
- */
- u32 cpu_caps[NR_KVM_CPU_CAPS];
-
u64 reserved_gpa_bits;
int maxphyaddr;
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 6d948d63306c..27e2f7e25038 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -284,7 +284,7 @@ static __always_inline void kvm_update_feature_runtime(struct kvm_vcpu *vcpu,
bool has_feature)
{
cpuid_entry_change(entry, x86_feature, has_feature);
- guest_cpu_cap_change(vcpu, x86_feature, has_feature);
+ guest_cpu_cap_change(vcpu->common, x86_feature, has_feature);
}
static void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu)
@@ -382,7 +382,7 @@ void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
bool allow_gbpages;
int i;
- memset(vcpu->arch.cpu_caps, 0, sizeof(vcpu->arch.cpu_caps));
+ memset(common->arch.cpu_caps, 0, sizeof(common->arch.cpu_caps));
BUILD_BUG_ON(ARRAY_SIZE(reverse_cpuid) != NR_KVM_CPU_CAPS);
/*
@@ -408,9 +408,9 @@ void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
* in guest CPUID. Note, this includes features that are
* supported by KVM but aren't advertised to userspace!
*/
- vcpu->arch.cpu_caps[i] = kvm_cpu_caps[i] |
- cpuid_get_reg_unsafe(&emulated, cpuid.reg);
- vcpu->arch.cpu_caps[i] &= cpuid_get_reg_unsafe(entry, cpuid.reg);
+ common->arch.cpu_caps[i] = kvm_cpu_caps[i] |
+ cpuid_get_reg_unsafe(&emulated, cpuid.reg);
+ common->arch.cpu_caps[i] &= cpuid_get_reg_unsafe(entry, cpuid.reg);
}
kvm_update_cpuid_runtime(vcpu);
@@ -428,7 +428,7 @@ void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
*/
allow_gbpages = tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) :
guest_cpu_cap_has(vcpu, X86_FEATURE_GBPAGES);
- guest_cpu_cap_change(vcpu, X86_FEATURE_GBPAGES, allow_gbpages);
+ guest_cpu_cap_change(common, X86_FEATURE_GBPAGES, allow_gbpages);
best = kvm_find_cpuid_entry(vcpu, 1);
if (best && apic) {
@@ -536,8 +536,8 @@ static int kvm_set_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
swap(common->arch.cpuid_entries, e2);
swap(common->arch.cpuid_nent, nent);
- memcpy(vcpu_caps, vcpu->arch.cpu_caps, sizeof(vcpu_caps));
- BUILD_BUG_ON(sizeof(vcpu_caps) != sizeof(vcpu->arch.cpu_caps));
+ memcpy(vcpu_caps, common->arch.cpu_caps, sizeof(vcpu_caps));
+ BUILD_BUG_ON(sizeof(vcpu_caps) != sizeof(common->arch.cpu_caps));
/*
* KVM does not correctly handle changing guest CPUID after KVM_RUN or
@@ -582,7 +582,7 @@ static int kvm_set_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
return 0;
err:
- memcpy(vcpu->arch.cpu_caps, vcpu_caps, sizeof(vcpu_caps));
+ memcpy(common->arch.cpu_caps, vcpu_caps, sizeof(vcpu_caps));
swap(common->arch.cpuid_entries, e2);
swap(common->arch.cpuid_nent, nent);
return r;
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index 143ea8531611..75abf447eabf 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -239,36 +239,37 @@ static __always_inline bool guest_pv_has(struct kvm_vcpu *vcpu,
return vcpu->arch.pv_cpuid.features & (1u << kvm_feature);
}
-static __always_inline void guest_cpu_cap_set(struct kvm_vcpu *vcpu,
+static __always_inline void guest_cpu_cap_set(struct kvm_vcpu_common *common,
unsigned int x86_feature)
{
unsigned int x86_leaf = __feature_leaf(x86_feature);
- vcpu->arch.cpu_caps[x86_leaf] |= __feature_bit(x86_feature);
+ common->arch.cpu_caps[x86_leaf] |= __feature_bit(x86_feature);
}
-static __always_inline void guest_cpu_cap_clear(struct kvm_vcpu *vcpu,
+static __always_inline void guest_cpu_cap_clear(struct kvm_vcpu_common *common,
unsigned int x86_feature)
{
unsigned int x86_leaf = __feature_leaf(x86_feature);
- vcpu->arch.cpu_caps[x86_leaf] &= ~__feature_bit(x86_feature);
+ common->arch.cpu_caps[x86_leaf] &= ~__feature_bit(x86_feature);
}
-static __always_inline void guest_cpu_cap_change(struct kvm_vcpu *vcpu,
+static __always_inline void guest_cpu_cap_change(struct kvm_vcpu_common *common,
unsigned int x86_feature,
bool guest_has_cap)
{
if (guest_has_cap)
- guest_cpu_cap_set(vcpu, x86_feature);
+ guest_cpu_cap_set(common, x86_feature);
else
- guest_cpu_cap_clear(vcpu, x86_feature);
+ guest_cpu_cap_clear(common, x86_feature);
}
static __always_inline bool guest_cpu_cap_has(struct kvm_vcpu *vcpu,
unsigned int x86_feature)
{
unsigned int x86_leaf = __feature_leaf(x86_feature);
+ struct kvm_vcpu_common *common = vcpu->common;
/*
* Except for MWAIT, querying dynamic feature bits is disallowed, so
@@ -278,7 +279,7 @@ static __always_inline bool guest_cpu_cap_has(struct kvm_vcpu *vcpu,
x86_feature == X86_FEATURE_OSXSAVE ||
x86_feature == X86_FEATURE_OSPKE);
- return vcpu->arch.cpu_caps[x86_leaf] & __feature_bit(x86_feature);
+ return common->arch.cpu_caps[x86_leaf] & __feature_bit(x86_feature);
}
static inline bool kvm_vcpu_is_legal_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 612db7ad8b2a..0b57dde29e40 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -4706,7 +4706,7 @@ static void svm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
* XSS on VM-Enter/VM-Exit. Failure to do so would effectively give
* the guest read/write access to the host's XSS.
*/
- guest_cpu_cap_change(vcpu, X86_FEATURE_XSAVES,
+ guest_cpu_cap_change(vcpu->common, X86_FEATURE_XSAVES,
boot_cpu_has(X86_FEATURE_XSAVES) &&
guest_cpu_cap_has(vcpu, X86_FEATURE_XSAVE));
@@ -4716,7 +4716,7 @@ static void svm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
* SVM on Intel is bonkers and extremely unlikely to work).
*/
if (guest_cpuid_is_intel_compatible(vcpu))
- guest_cpu_cap_clear(vcpu, X86_FEATURE_V_VMSAVE_VMLOAD);
+ guest_cpu_cap_clear(vcpu->common, X86_FEATURE_V_VMSAVE_VMLOAD);
if (is_sev_guest(vcpu))
sev_vcpu_after_set_cpuid(svm);
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 62e180651143..d10aa5f60cad 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -7994,7 +7994,7 @@ void vmx_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
* set if and only if XSAVE is supported.
*/
if (!guest_cpu_cap_has(vcpu, X86_FEATURE_XSAVE))
- guest_cpu_cap_clear(vcpu, X86_FEATURE_XSAVES);
+ guest_cpu_cap_clear(vcpu->common, X86_FEATURE_XSAVES);
vmx_setup_uret_msrs(vmx);
--
2.53.0
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