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From: Dave Jiang <dave.jiang@intel.com>
To: Dan Williams <dan.j.williams@intel.com>, linux-cxl@vger.kernel.org
Cc: Kees Cook <keescook@chromium.org>,
	dave.hansen@linux.intel.com, linux-mm@kvack.org,
	linux-acpi@vger.kernel.org
Subject: Re: [PATCH 08/18] kernel/range: Uplevel the cxl subsystem's range_contains() helper
Date: Mon, 6 Feb 2023 16:41:47 -0700	[thread overview]
Message-ID: <081043d0-d8c5-d86a-8515-aaf1ed7ba47e@intel.com> (raw)
In-Reply-To: <167564539327.847146.788601375229324484.stgit@dwillia2-xfh.jf.intel.com>



On 2/5/23 6:03 PM, Dan Williams wrote:
> In support of the CXL subsystem's use of 'struct range' to track decode
> address ranges, add a common range_contains() implementation with
> identical semantics as resource_contains();
> 
> The existing 'range_contains()' in lib/stackinit_kunit.c is namespaced
> with a 'stackinit_' prefix.
> 
> Cc: Kees Cook <keescook@chromium.org>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>

Reviewed-by: Dave Jiang <dave.jiang@intel.com>

I can use this in my QTG series for DPA matching.
> ---
>   drivers/cxl/core/pci.c |    5 -----
>   include/linux/range.h  |    5 +++++
>   lib/stackinit_kunit.c  |    6 +++---
>   3 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
> index 1d1492440287..9ed2120dbf8a 100644
> --- a/drivers/cxl/core/pci.c
> +++ b/drivers/cxl/core/pci.c
> @@ -214,11 +214,6 @@ static int devm_cxl_enable_mem(struct device *host, struct cxl_dev_state *cxlds)
>   	return devm_add_action_or_reset(host, clear_mem_enable, cxlds);
>   }
>   
> -static bool range_contains(struct range *r1, struct range *r2)
> -{
> -	return r1->start <= r2->start && r1->end >= r2->end;
> -}
> -
>   /* require dvsec ranges to be covered by a locked platform window */
>   static int dvsec_range_allowed(struct device *dev, void *arg)
>   {
> diff --git a/include/linux/range.h b/include/linux/range.h
> index 274681cc3154..7efb6a9b069b 100644
> --- a/include/linux/range.h
> +++ b/include/linux/range.h
> @@ -13,6 +13,11 @@ static inline u64 range_len(const struct range *range)
>   	return range->end - range->start + 1;
>   }
>   
> +static inline bool range_contains(struct range *r1, struct range *r2)
> +{
> +	return r1->start <= r2->start && r1->end >= r2->end;
> +}
> +
>   int add_range(struct range *range, int az, int nr_range,
>   		u64 start, u64 end);
>   
> diff --git a/lib/stackinit_kunit.c b/lib/stackinit_kunit.c
> index 4591d6cf5e01..05947a2feb93 100644
> --- a/lib/stackinit_kunit.c
> +++ b/lib/stackinit_kunit.c
> @@ -31,8 +31,8 @@ static volatile u8 forced_mask = 0xff;
>   static void *fill_start, *target_start;
>   static size_t fill_size, target_size;
>   
> -static bool range_contains(char *haystack_start, size_t haystack_size,
> -			   char *needle_start, size_t needle_size)
> +static bool stackinit_range_contains(char *haystack_start, size_t haystack_size,
> +				     char *needle_start, size_t needle_size)
>   {
>   	if (needle_start >= haystack_start &&
>   	    needle_start + needle_size <= haystack_start + haystack_size)
> @@ -175,7 +175,7 @@ static noinline void test_ ## name (struct kunit *test)		\
>   								\
>   	/* Validate that compiler lined up fill and target. */	\
>   	KUNIT_ASSERT_TRUE_MSG(test,				\
> -		range_contains(fill_start, fill_size,		\
> +		stackinit_range_contains(fill_start, fill_size,	\
>   			    target_start, target_size),		\
>   		"stack fill missed target!? "			\
>   		"(fill %zu wide, target offset by %d)\n",	\
> 


  parent reply	other threads:[~2023-02-06 23:41 UTC|newest]

Thread overview: 111+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-06  1:02 [PATCH 00/18] CXL RAM and the 'Soft Reserved' => 'System RAM' default Dan Williams
2023-02-06  1:02 ` [PATCH 01/18] cxl/Documentation: Update references to attributes added in v6.0 Dan Williams
2023-02-06 15:17   ` Jonathan Cameron
2023-02-06 16:37   ` Gregory Price
2023-02-06 17:27   ` [PATCH 1/18] " Davidlohr Bueso
2023-02-06 19:15   ` [PATCH 01/18] " Ira Weiny
2023-02-06 21:04   ` Dave Jiang
2023-02-09  0:20   ` Verma, Vishal L
2023-02-06  1:02 ` [PATCH 02/18] cxl/region: Add a mode attribute for regions Dan Williams
2023-02-06 15:46   ` Jonathan Cameron
2023-02-06 17:47     ` Dan Williams
2023-02-06 16:39   ` Gregory Price
2023-02-06 19:16   ` Ira Weiny
2023-02-06 21:05   ` Dave Jiang
2023-02-09  0:22   ` Verma, Vishal L
2023-02-06  1:02 ` [PATCH 03/18] cxl/region: Support empty uuids for non-pmem regions Dan Williams
2023-02-06 15:54   ` Jonathan Cameron
2023-02-06 18:07     ` Dan Williams
2023-02-06 19:22   ` Ira Weiny
2023-02-06 19:35     ` Dan Williams
2023-02-09  0:24   ` Verma, Vishal L
2023-02-06  1:02 ` [PATCH 04/18] cxl/region: Validate region mode vs decoder mode Dan Williams
2023-02-06 16:02   ` Jonathan Cameron
2023-02-06 18:14     ` Dan Williams
2023-02-06 16:44   ` Gregory Price
2023-02-06 21:51     ` Dan Williams
2023-02-06 19:55       ` Gregory Price
2023-02-06 19:23   ` Ira Weiny
2023-02-06 22:16   ` Dave Jiang
2023-02-09  0:25   ` Verma, Vishal L
2023-02-06  1:02 ` [PATCH 05/18] cxl/region: Add volatile region creation support Dan Williams
2023-02-06 16:18   ` Jonathan Cameron
2023-02-06 18:19     ` Dan Williams
2023-02-06 16:55   ` Gregory Price
2023-02-06 21:57     ` Dan Williams
2023-02-06 19:56       ` Gregory Price
2023-02-06 19:25   ` Ira Weiny
2023-02-06 22:31   ` Dave Jiang
2023-02-06 22:37     ` Dan Williams
2023-02-09  1:02   ` Verma, Vishal L
2023-02-06  1:03 ` [PATCH 06/18] cxl/region: Refactor attach_target() for autodiscovery Dan Williams
2023-02-06 17:06   ` Jonathan Cameron
2023-02-06 18:48     ` Dan Williams
2023-02-06 19:26   ` Ira Weiny
2023-02-06 22:41   ` Dave Jiang
2023-02-09  1:09   ` Verma, Vishal L
2023-02-06  1:03 ` [PATCH 07/18] cxl/region: Move region-position validation to a helper Dan Williams
2023-02-06 17:44   ` Ira Weiny
2023-02-06 19:15     ` Dan Williams
2023-02-08 12:30   ` Jonathan Cameron
2023-02-09  4:09     ` Dan Williams
2023-02-09  4:26     ` Dan Williams
2023-02-09 11:07       ` Jonathan Cameron
2023-02-09 20:52         ` Dan Williams
2023-02-09 19:45   ` Verma, Vishal L
2023-02-06  1:03 ` [PATCH 08/18] kernel/range: Uplevel the cxl subsystem's range_contains() helper Dan Williams
2023-02-06 17:02   ` Gregory Price
2023-02-06 22:01     ` Dan Williams
2023-02-06 19:28   ` Ira Weiny
2023-02-06 23:41   ` Dave Jiang [this message]
2023-02-08 12:32   ` Jonathan Cameron
2023-02-09 19:47   ` Verma, Vishal L
2023-02-06  1:03 ` [PATCH 09/18] cxl/region: Enable CONFIG_CXL_REGION to be toggled Dan Williams
2023-02-06 17:03   ` Gregory Price
2023-02-06 23:57   ` Dave Jiang
2023-02-08 12:36   ` Jonathan Cameron
2023-02-09 20:17   ` Verma, Vishal L
2023-02-06  1:03 ` [PATCH 10/18] cxl/region: Fix passthrough-decoder detection Dan Williams
2023-02-06  5:38   ` Greg KH
2023-02-06 17:22     ` Dan Williams
2023-02-07  0:00   ` Dave Jiang
2023-02-08 12:44   ` Jonathan Cameron
2023-02-09 20:28   ` Verma, Vishal L
2023-02-06  1:03 ` [PATCH 11/18] cxl/region: Add region autodiscovery Dan Williams
2023-02-06 19:02   ` Ira Weiny
2023-02-07 23:54   ` Dave Jiang
2023-02-08 17:07   ` Jonathan Cameron
2023-02-09  4:07     ` Dan Williams
2023-02-06  1:03 ` [PATCH 12/18] tools/testing/cxl: Define a fixed volatile configuration to parse Dan Williams
2023-02-08 17:31   ` Jonathan Cameron
2023-02-09 20:50     ` Dan Williams
2023-02-06  1:03 ` [PATCH 13/18] dax/hmem: Move HMAT and Soft reservation probe initcall level Dan Williams
2023-02-06  1:03 ` [PATCH 14/18] dax/hmem: Drop unnecessary dax_hmem_remove() Dan Williams
2023-02-06 17:15   ` Gregory Price
2023-02-08 17:33   ` Jonathan Cameron
2023-02-06  1:03 ` [PATCH 15/18] dax/hmem: Convey the dax range via memregion_info() Dan Williams
2023-02-08 17:35   ` Jonathan Cameron
2023-02-06  1:03 ` [PATCH 16/18] dax/hmem: Move hmem device registration to dax_hmem.ko Dan Williams
2023-02-06  1:04 ` [PATCH 17/18] dax: Assign RAM regions to memory-hotplug by default Dan Williams
2023-02-06 17:26   ` Gregory Price
2023-02-06 22:15     ` Dan Williams
2023-02-06 19:05       ` Gregory Price
2023-02-06 23:20         ` Dan Williams
2023-02-06  1:04 ` [PATCH 18/18] cxl/dax: Create dax devices for CXL RAM regions Dan Williams
2023-02-06  5:36 ` [PATCH 00/18] CXL RAM and the 'Soft Reserved' => 'System RAM' default Gregory Price
2023-02-06 16:40   ` Davidlohr Bueso
2023-02-06 18:23     ` Dan Williams
2023-02-06 17:29   ` Dan Williams
2023-02-06 17:18     ` Davidlohr Bueso
     [not found] ` <CGME20230208173730uscas1p2af3a9eeb8946dfa607b190c079a49653@uscas1p2.samsung.com>
2023-02-08 17:37   ` Fan Ni
2023-02-09  4:56     ` Dan Williams
2023-02-13 12:13 ` David Hildenbrand
2023-02-14 18:45   ` Dan Williams
2023-02-14 18:27 ` Gregory Price
2023-02-14 18:39   ` Dan Williams
2023-02-14 19:01     ` Gregory Price
2023-02-14 21:18       ` Jonathan Cameron
2023-02-14 21:51         ` Gregory Price
2023-02-14 21:54           ` Gregory Price
2023-02-15 10:03             ` Jonathan Cameron
2023-02-18  9:47               ` Gregory Price

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