Re: [PATCH] ppc64: Fix possible race with set_pte on a present PTE

Matthew Wilcox
2004-05-25T11:44:37Z

On Mon, May 24, 2004 at 09:00:02PM -0700, Linus Torvalds wrote:
> I suspect we should just make a "ptep_set_bits()" inline function that
> _atomically_ does "set the dirty/accessed bits". On x86, it would be a
> simple
>
> asm("lock ; orl %1,%0"
> :"m" (*ptep)
> :"r" (entry));
>
> and similarly on most other architectures it should be quite easy to do
> the equivalent. You can always do it with a simple compare-and-exchange
> loop, something any SMP-capable architecture should have.

... but PA doesn't. Just load-and-clear-word (and its 64-bit equivalent
in 64-bit mode). And that word has to be 16-byte aligned. What race
are we protecting against? If it's like xchg() and we only need to
protect against a racing xchg() and not a reader, we can just reuse the
global array of hashed spinlocks we have for that.

> Of course, arguably we can actually optimize this by "knowing" that it is
> safe to set the dirty bit, so then we don't even need an atomic operation,
> we just need one atomic write. So we only actually need the atomic op for
> the accessed bit case, and if we make the write-case be totally separate..

Ah, atomic writes we can do. That's easy. I think all Linux architectures
support atomic writes to naturally aligned addresses, don't they?

> Anybody willing to write up a patch for a few architectures? Is there any
> architecture out there that would have a problem with this?
>
> Linus

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