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From: Mel Gorman <mgorman@suse.de>
To: Alex Shi <alex.shi@linaro.org>
Cc: H Peter Anvin <hpa@zytor.com>, Linux-X86 <x86@kernel.org>,
	Linux-MM <linux-mm@kvack.org>,
	LKML <linux-kernel@vger.kernel.org>, Mel Gorman <mgorman@suse.de>
Subject: [PATCH 3/3] x86: mm: Account for the of CPUs that must be flushed during a TLB range flush
Date: Thu, 12 Dec 2013 11:55:09 +0000	[thread overview]
Message-ID: <1386849309-22584-4-git-send-email-mgorman@suse.de> (raw)
In-Reply-To: <1386849309-22584-1-git-send-email-mgorman@suse.de>

X86 TLB range flushing uses a balance point to decide if a single global TLB
flush or multiple single page flushes would perform best.  This patch takes into
account how many CPUs must be flushed.

Signed-off-by: Mel Gorman <mgorman@suse.de>
---
 arch/x86/mm/tlb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 09b8cb8..0cababa 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -217,6 +217,9 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
 	act_entries = mm->total_vm > act_entries ? act_entries : mm->total_vm;
 	nr_base_pages = (end - start) >> PAGE_SHIFT;
 
+	/* Take the number of CPUs to range flush into account */
+	nr_base_pages *= cpumask_weight(mm_cpumask(mm));
+
 	/* tlb_flushall_shift is on balance point, details in commit log */
 	if (nr_base_pages > act_entries || has_large_page(mm, start, end)) {
 		count_vm_event(NR_TLB_LOCAL_FLUSH_ALL);
-- 
1.8.4

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  parent reply	other threads:[~2013-12-12 11:55 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-12 11:55 [RFC PATCH 0/3] Fix ebizzy performance regression on IvyBridge due to X86 TLB range flush Mel Gorman
2013-12-12 11:55 ` [PATCH 1/3] x86: mm: Clean up inconsistencies when flushing TLB ranges Mel Gorman
2013-12-12 13:59   ` Alex Shi
2013-12-12 23:53     ` Mel Gorman
2013-12-12 11:55 ` [PATCH 2/3] x86: mm: Change tlb_flushall_shift for IvyBridge Mel Gorman
2013-12-12 13:13   ` Ingo Molnar
2013-12-12 13:38     ` Alex Shi
2013-12-12 14:11       ` Ingo Molnar
2013-12-13  1:02         ` Alex Shi
2013-12-13  2:11           ` Alex Shi
2013-12-13 13:43             ` Ingo Molnar
2013-12-14 11:01               ` Alex Shi
2013-12-14 14:19             ` Peter Zijlstra
2013-12-14 14:27               ` Peter Zijlstra
2013-12-16 13:59                 ` Ingo Molnar
2013-12-17 11:59                   ` Alex Shi
2013-12-17 13:14                     ` Ingo Molnar
2013-12-16  8:26               ` Alex Shi
2013-12-16 10:06                 ` Peter Zijlstra
2013-12-12 13:45   ` Alex Shi
2013-12-12 11:55 ` Mel Gorman [this message]
2013-12-12 13:41   ` [PATCH 3/3] x86: mm: Account for the of CPUs that must be flushed during a TLB range flush Alex Shi
2013-12-12 13:01 ` [RFC PATCH 0/3] Fix ebizzy performance regression on IvyBridge due to X86 " Ingo Molnar
2013-12-12 14:40   ` Mel Gorman
2013-12-13 13:35     ` Ingo Molnar

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