From: Toshi Kani <toshi.kani@hp.com>
To: hpa@zytor.com, tglx@linutronix.de, mingo@redhat.com,
akpm@linuxfoundation.org, arnd@arndb.de
Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org,
jgross@suse.com, stefan.bader@canonical.com, luto@amacapital.net,
konrad.wilk@oracle.com, Toshi Kani <toshi.kani@hp.com>
Subject: [PATCH 4/5] x86, mm: Add set_memory_wt() for WT
Date: Thu, 4 Sep 2014 12:35:38 -0600 [thread overview]
Message-ID: <1409855739-8985-5-git-send-email-toshi.kani@hp.com> (raw)
In-Reply-To: <1409855739-8985-1-git-send-email-toshi.kani@hp.com>
This patch adds set_memory_wt(), set_memory_array_wt(), and
set_pages_array_wt() for setting range(s) of memory to WT.
Note that reserve_memtype() only supports WT for non-RAM ranges
at this point.
Signed-off-by: Toshi Kani <toshi.kani@hp.com>
---
arch/x86/include/asm/cacheflush.h | 6 +++
arch/x86/mm/pageattr.c | 73 ++++++++++++++++++++++++++++++++++---
2 files changed, 72 insertions(+), 7 deletions(-)
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index c912680..5bfd5d0 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -81,7 +81,7 @@ static inline void set_page_memtype(struct page *pg,
/*
* The set_memory_* API can be used to change various attributes of a virtual
* address range. The attributes include:
- * Cachability : UnCached, WriteCombining, WriteBack
+ * Cachability : UnCached, WriteCombining, WriteThrough, WriteBack
* Executability : eXeutable, NoteXecutable
* Read/Write : ReadOnly, ReadWrite
* Presence : NotPresent
@@ -108,9 +108,11 @@ static inline void set_page_memtype(struct page *pg,
int _set_memory_uc(unsigned long addr, int numpages);
int _set_memory_wc(unsigned long addr, int numpages);
+int _set_memory_wt(unsigned long addr, int numpages);
int _set_memory_wb(unsigned long addr, int numpages);
int set_memory_uc(unsigned long addr, int numpages);
int set_memory_wc(unsigned long addr, int numpages);
+int set_memory_wt(unsigned long addr, int numpages);
int set_memory_wb(unsigned long addr, int numpages);
int set_memory_x(unsigned long addr, int numpages);
int set_memory_nx(unsigned long addr, int numpages);
@@ -121,10 +123,12 @@ int set_memory_4k(unsigned long addr, int numpages);
int set_memory_array_uc(unsigned long *addr, int addrinarray);
int set_memory_array_wc(unsigned long *addr, int addrinarray);
+int set_memory_array_wt(unsigned long *addr, int addrinarray);
int set_memory_array_wb(unsigned long *addr, int addrinarray);
int set_pages_array_uc(struct page **pages, int addrinarray);
int set_pages_array_wc(struct page **pages, int addrinarray);
+int set_pages_array_wt(struct page **pages, int addrinarray);
int set_pages_array_wb(struct page **pages, int addrinarray);
/*
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 6917b39..2dda151 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1484,12 +1484,10 @@ EXPORT_SYMBOL(set_memory_uc);
static int _set_memory_array(unsigned long *addr, int addrinarray,
enum page_cache_mode new_type)
{
+ enum page_cache_mode set_type;
int i, j;
int ret;
- /*
- * for now UC MINUS. see comments in ioremap_nocache()
- */
for (i = 0; i < addrinarray; i++) {
ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
new_type, NULL);
@@ -1497,9 +1495,12 @@ static int _set_memory_array(unsigned long *addr, int addrinarray,
goto out_free;
}
+ /* If WC, set to UC- first and then WC */
+ set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
+ _PAGE_CACHE_MODE_UC_MINUS : new_type;
+
ret = change_page_attr_set(addr, addrinarray,
- cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
- 1);
+ cachemode2pgprot(set_type), 1);
if (!ret && new_type == _PAGE_CACHE_MODE_WC)
ret = change_page_attr_set_clr(addr, addrinarray,
@@ -1527,10 +1528,22 @@ EXPORT_SYMBOL(set_memory_array_uc);
int set_memory_array_wc(unsigned long *addr, int addrinarray)
{
+ if (!pat_enabled)
+ return set_memory_array_uc(addr, addrinarray);
+
return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
}
EXPORT_SYMBOL(set_memory_array_wc);
+int set_memory_array_wt(unsigned long *addr, int addrinarray)
+{
+ if (!pat_enabled)
+ return set_memory_array_uc(addr, addrinarray);
+
+ return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
+}
+EXPORT_SYMBOL(set_memory_array_wt);
+
int _set_memory_wc(unsigned long addr, int numpages)
{
int ret;
@@ -1574,6 +1587,37 @@ out_err:
}
EXPORT_SYMBOL(set_memory_wc);
+int _set_memory_wt(unsigned long addr, int numpages)
+{
+ return change_page_attr_set(&addr, numpages,
+ cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
+}
+
+int set_memory_wt(unsigned long addr, int numpages)
+{
+ int ret;
+
+ if (!pat_enabled)
+ return set_memory_uc(addr, numpages);
+
+ ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
+ _PAGE_CACHE_MODE_WT, NULL);
+ if (ret)
+ goto out_err;
+
+ ret = _set_memory_wt(addr, numpages);
+ if (ret)
+ goto out_free;
+
+ return 0;
+
+out_free:
+ free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
+out_err:
+ return ret;
+}
+EXPORT_SYMBOL(set_memory_wt);
+
int _set_memory_wb(unsigned long addr, int numpages)
{
/* WB cache mode is hard wired to all cache attribute bits being 0 */
@@ -1666,6 +1710,7 @@ static int _set_pages_array(struct page **pages, int addrinarray,
{
unsigned long start;
unsigned long end;
+ enum page_cache_mode set_type;
int i;
int free_idx;
int ret;
@@ -1679,8 +1724,12 @@ static int _set_pages_array(struct page **pages, int addrinarray,
goto err_out;
}
+ /* If WC, set to UC- first and then WC */
+ set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
+ _PAGE_CACHE_MODE_UC_MINUS : new_type;
+
ret = cpa_set_pages_array(pages, addrinarray,
- cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS));
+ cachemode2pgprot(set_type));
if (!ret && new_type == _PAGE_CACHE_MODE_WC)
ret = change_page_attr_set_clr(NULL, addrinarray,
cachemode2pgprot(
@@ -1710,10 +1759,22 @@ EXPORT_SYMBOL(set_pages_array_uc);
int set_pages_array_wc(struct page **pages, int addrinarray)
{
+ if (!pat_enabled)
+ return set_pages_array_uc(pages, addrinarray);
+
return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
}
EXPORT_SYMBOL(set_pages_array_wc);
+int set_pages_array_wt(struct page **pages, int addrinarray)
+{
+ if (!pat_enabled)
+ return set_pages_array_uc(pages, addrinarray);
+
+ return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
+}
+EXPORT_SYMBOL(set_pages_array_wt);
+
int set_pages_wb(struct page *page, int numpages)
{
unsigned long addr = (unsigned long)page_address(page);
--
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next prev parent reply other threads:[~2014-09-04 18:47 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-04 18:35 [PATCH 0/5] Support Write-Through mapping on x86 Toshi Kani
2014-09-04 18:35 ` [PATCH 1/5] x86, mm, pat: Set WT to PA4 slot of PAT MSR Toshi Kani
2014-09-04 20:11 ` Henrique de Moraes Holschuh
2014-09-04 20:21 ` H. Peter Anvin
2014-09-04 23:19 ` Henrique de Moraes Holschuh
2014-09-04 23:34 ` Andy Lutomirski
2014-09-05 0:29 ` Toshi Kani
2014-09-05 0:51 ` Andy Lutomirski
2014-09-05 14:00 ` Toshi Kani
2014-09-05 15:07 ` H. Peter Anvin
2014-09-05 15:22 ` Toshi Kani
2014-09-05 15:41 ` H. Peter Anvin
2014-09-05 15:42 ` Toshi Kani
2014-09-12 19:25 ` Konrad Rzeszutek Wilk
2014-09-12 20:03 ` Andy Lutomirski
2014-09-12 20:21 ` Konrad Rzeszutek Wilk
2014-09-04 20:31 ` Toshi Kani
2014-09-04 20:50 ` Andy Lutomirski
2014-09-04 23:27 ` Toshi Kani
2014-09-05 10:23 ` Ingo Molnar
2014-09-05 13:50 ` Toshi Kani
2014-09-07 13:58 ` Henrique de Moraes Holschuh
2014-09-04 18:35 ` [PATCH 2/5] x86, mm, pat: Change reserve_memtype() to handle WT Toshi Kani
2014-09-04 18:35 ` [PATCH 3/5] x86, mm, asm-gen: Add ioremap_wt() for WT Toshi Kani
2014-09-04 18:35 ` Toshi Kani [this message]
2014-09-04 18:57 ` [PATCH 4/5] x86, mm: Add set_memory_wt() " Andy Lutomirski
2014-09-04 18:57 ` Toshi Kani
2014-09-04 19:14 ` Andy Lutomirski
2014-09-04 19:30 ` Toshi Kani
2014-09-07 8:49 ` Yigal Korman
2014-09-07 16:49 ` Andy Lutomirski
2014-09-08 15:07 ` Toshi Kani
2014-09-08 17:23 ` Andy Lutomirski
2014-09-08 18:42 ` Toshi Kani
2014-09-04 18:35 ` [PATCH 5/5] x86, mm, pat: Add pgprot_writethrough() " Toshi Kani
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