From: Qiaowei Ren <qiaowei.ren@intel.com>
To: "H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
Dave Hansen <dave.hansen@intel.com>
Cc: x86@kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org,
linux-ia64@vger.kernel.org, linux-mips@linux-mips.org,
Qiaowei Ren <qiaowei.ren@intel.com>
Subject: [PATCH v9 08/12] ia64: sync struct siginfo with general version
Date: Sun, 12 Oct 2014 12:41:51 +0800 [thread overview]
Message-ID: <1413088915-13428-9-git-send-email-qiaowei.ren@intel.com> (raw)
In-Reply-To: <1413088915-13428-1-git-send-email-qiaowei.ren@intel.com>
New fields about bound violation are added into general struct
siginfo. This will impact MIPS and IA64, which extend general
struct siginfo. This patch syncs this struct for IA64 with
general version.
Signed-off-by: Qiaowei Ren <qiaowei.ren@intel.com>
---
arch/ia64/include/uapi/asm/siginfo.h | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/ia64/include/uapi/asm/siginfo.h b/arch/ia64/include/uapi/asm/siginfo.h
index 4ea6225..bce9bc1 100644
--- a/arch/ia64/include/uapi/asm/siginfo.h
+++ b/arch/ia64/include/uapi/asm/siginfo.h
@@ -63,6 +63,10 @@ typedef struct siginfo {
unsigned int _flags; /* see below */
unsigned long _isr; /* isr */
short _addr_lsb; /* lsb of faulting address */
+ struct {
+ void __user *_lower;
+ void __user *_upper;
+ } _addr_bnd;
} _sigfault;
/* SIGPOLL */
@@ -110,9 +114,9 @@ typedef struct siginfo {
/*
* SIGSEGV si_codes
*/
-#define __SEGV_PSTKOVF (__SI_FAULT|3) /* paragraph stack overflow */
+#define __SEGV_PSTKOVF (__SI_FAULT|4) /* paragraph stack overflow */
#undef NSIGSEGV
-#define NSIGSEGV 3
+#define NSIGSEGV 4
#undef NSIGTRAP
#define NSIGTRAP 4
--
1.7.1
--
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next prev parent reply other threads:[~2014-10-12 4:51 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-12 4:41 [PATCH v9 00/12] Intel MPX support Qiaowei Ren
2014-10-12 4:41 ` [PATCH v9 01/12] x86, mpx: introduce VM_MPX to indicate that a VMA is MPX specific Qiaowei Ren
2014-10-12 4:41 ` [PATCH v9 02/12] x86, mpx: rename cfg_reg_u and status_reg Qiaowei Ren
2014-10-12 4:41 ` [PATCH v9 03/12] x86, mpx: add MPX specific mmap interface Qiaowei Ren
2014-10-12 4:41 ` [PATCH v9 04/12] x86, mpx: add MPX to disaabled features Qiaowei Ren
2014-10-12 4:41 ` [PATCH v9 05/12] x86, mpx: on-demand kernel allocation of bounds tables Qiaowei Ren
2014-10-24 12:08 ` Thomas Gleixner
2014-10-27 3:20 ` Ren Qiaowei
2014-10-28 17:43 ` Dave Hansen
2014-10-28 17:57 ` Thomas Gleixner
2014-10-12 4:41 ` [PATCH v9 06/12] mpx: extend siginfo structure to include bound violation information Qiaowei Ren
2014-10-12 4:41 ` [PATCH v9 07/12] mips: sync struct siginfo with general version Qiaowei Ren
2014-10-12 4:41 ` Qiaowei Ren [this message]
2014-10-12 4:41 ` [PATCH v9 09/12] x86, mpx: decode MPX instruction to get bound violation information Qiaowei Ren
2014-10-24 12:36 ` Thomas Gleixner
2014-10-27 1:43 ` Ren, Qiaowei
2014-10-27 20:36 ` Thomas Gleixner
2014-10-28 5:58 ` Ren Qiaowei
2014-10-31 20:16 ` Dave Hansen
2014-10-31 20:33 ` Thomas Gleixner
2014-10-30 22:38 ` Dave Hansen
2014-10-31 2:12 ` Ren Qiaowei
2014-10-31 9:09 ` Thomas Gleixner
2014-10-12 4:41 ` [PATCH v9 10/12] x86, mpx: add prctl commands PR_MPX_ENABLE_MANAGEMENT, PR_MPX_DISABLE_MANAGEMENT Qiaowei Ren
2014-10-24 12:49 ` Thomas Gleixner
2014-10-24 15:10 ` Thomas Gleixner
2014-10-27 2:17 ` Ren, Qiaowei
2014-10-27 20:38 ` Thomas Gleixner
2014-10-28 5:57 ` Ren Qiaowei
2014-10-12 4:41 ` [PATCH v9 11/12] x86, mpx: cleanup unused bound tables Qiaowei Ren
2014-10-24 14:40 ` Thomas Gleixner
2014-10-27 3:13 ` Ren Qiaowei
2014-10-27 20:49 ` Thomas Gleixner
2014-10-28 5:56 ` Ren Qiaowei
2014-10-28 10:42 ` Thomas Gleixner
2014-11-03 20:53 ` Dave Hansen
2014-11-03 21:29 ` Thomas Gleixner
2014-11-04 16:00 ` Dave Hansen
2014-11-04 17:02 ` Thomas Gleixner
2014-11-06 21:50 ` Dave Hansen
2014-11-11 18:27 ` Thomas Gleixner
2014-11-11 20:44 ` Dave Hansen
2014-11-11 21:36 ` Thomas Gleixner
2014-10-12 4:41 ` [PATCH v9 12/12] x86, mpx: add documentation on Intel MPX Qiaowei Ren
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