From mboxrd@z Thu Jan 1 00:00:00 1970 From: Borislav Petkov Subject: [PATCH 2/4] x86/pat: Merge pat_init_cache_modes() into its caller Date: Sun, 31 May 2015 11:48:04 +0200 Message-ID: <1433065686-20922-2-git-send-email-bp@alien8.de> References: <20150531094655.GA20440@pd.tnic> <1433065686-20922-1-git-send-email-bp@alien8.de> Return-path: In-Reply-To: <1433065686-20922-1-git-send-email-bp@alien8.de> Sender: linux-kernel-owner@vger.kernel.org To: LKML Cc: Andrew Morton , Andy Lutomirski , arnd@arndb.de, Elliott@hp.com, hch@lst.de, hmh@hmh.eng.br, "H. Peter Anvin" , Ingo Molnar , jgross@suse.com, konrad.wilk@oracle.com, linux-mm , linux-nvdimm@lists.01.org, "Luis R. Rodriguez" , stefan.bader@canonical.com, Thomas Gleixner , Toshi Kani , x86-ml , yigal@plexistor.com List-Id: linux-mm.kvack.org From: Borislav Petkov This way we can pass pat MSR value directly. No functionality change. Signed-off-by: Borislav Petkov Cc: Andrew Morton Cc: Andy Lutomirski Cc: arnd@arndb.de Cc: Elliott@hp.com Cc: hch@lst.de Cc: hmh@hmh.eng.br Cc: H. Peter Anvin Cc: Ingo Molnar Cc: jgross@suse.com Cc: konrad.wilk@oracle.com Cc: linux-mm Cc: linux-nvdimm@lists.01.org Cc: Luis R. Rodriguez Cc: stefan.bader@canonical.com Cc: Thomas Gleixner Cc: Toshi Kani Cc: x86-ml Cc: yigal@plexistor.com --- arch/x86/mm/pat.c | 39 ++++++++++++++++----------------------- 1 file changed, 16 insertions(+), 23 deletions(-) diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index 476d0780560f..4d28759f5a1a 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c @@ -172,32 +172,14 @@ static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg) #undef CM -/* - * Update the cache mode to pgprot translation tables according to PAT - * configuration. - * Using lower indices is preferred, so we start with highest index. - */ -void pat_init_cache_modes(void) -{ - int i; - enum page_cache_mode cache; - char pat_msg[33]; - u64 pat; - - rdmsrl(MSR_IA32_CR_PAT, pat); - pat_msg[32] = 0; - for (i = 7; i >= 0; i--) { - cache = pat_get_cache_mode((pat >> (i * 8)) & 7, - pat_msg + 4 * i); - update_cache_mode_entry(i, cache); - } - pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg); -} - #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8)) static void pat_bsp_init(u64 pat) { + enum page_cache_mode cache; + char pat_msg[33]; + int i; + if (!cpu_has_pat) { pat_disable("PAT not supported by CPU."); return; @@ -211,7 +193,18 @@ static void pat_bsp_init(u64 pat) wrmsrl(MSR_IA32_CR_PAT, pat); - pat_init_cache_modes(); + pat_msg[32] = 0; + + /* + * Update the cache mode to pgprot translation tables according to PAT + * configuration. Using lower indices is preferred, so we start with + * highest index. + */ + for (i = 7; i >= 0; i--) { + cache = pat_get_cache_mode((pat >> (i * 8)) & 7, pat_msg + 4 * i); + update_cache_mode_entry(i, cache); + } + pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg); } static void pat_ap_init(u64 pat) -- 2.3.5