From: Huacai Chen <chenhc@lemote.com>
To: Andrew Morton <akpm@linux-foundation.org>
Cc: Fuxin Zhang <zhangfx@lemote.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
Huacai Chen <chenhc@lemote.com>,
stable@vger.kernel.org
Subject: [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode
Date: Wed, 13 Sep 2017 17:20:51 +0800 [thread overview]
Message-ID: <1505294451-21312-1-git-send-email-chenhc@lemote.com> (raw)
In non-coherent DMA mode, kernel uses cache flushing operations to
maintain I/O coherency, so the dmapool objects should be aligned to
ARCH_DMA_MINALIGN.
Cc: stable@vger.kernel.org
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
mm/dmapool.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/mm/dmapool.c b/mm/dmapool.c
index 4d90a64..2ac6f4a 100644
--- a/mm/dmapool.c
+++ b/mm/dmapool.c
@@ -140,6 +140,9 @@ struct dma_pool *dma_pool_create(const char *name, struct device *dev,
else if (align & (align - 1))
return NULL;
+ if (!plat_device_is_coherent(dev))
+ align = max_t(size_t, align, dma_get_cache_alignment());
+
if (size == 0)
return NULL;
else if (size < 4)
--
2.7.0
--
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next reply other threads:[~2017-09-13 9:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-13 9:20 Huacai Chen [this message]
2017-09-13 21:52 ` [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode Andrew Morton
2017-09-14 1:13 ` [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN innon-coherent " 陈华才
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