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* [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode
@ 2017-09-13  9:20 Huacai Chen
  2017-09-13 21:52 ` Andrew Morton
  0 siblings, 1 reply; 3+ messages in thread
From: Huacai Chen @ 2017-09-13  9:20 UTC (permalink / raw)
  To: Andrew Morton; +Cc: Fuxin Zhang, linux-mm, linux-kernel, Huacai Chen, stable

In non-coherent DMA mode, kernel uses cache flushing operations to
maintain I/O coherency, so the dmapool objects should be aligned to
ARCH_DMA_MINALIGN.

Cc: stable@vger.kernel.org
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 mm/dmapool.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/mm/dmapool.c b/mm/dmapool.c
index 4d90a64..2ac6f4a 100644
--- a/mm/dmapool.c
+++ b/mm/dmapool.c
@@ -140,6 +140,9 @@ struct dma_pool *dma_pool_create(const char *name, struct device *dev,
 	else if (align & (align - 1))
 		return NULL;
 
+	if (!plat_device_is_coherent(dev))
+		align = max_t(size_t, align, dma_get_cache_alignment());
+
 	if (size == 0)
 		return NULL;
 	else if (size < 4)
-- 
2.7.0



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end of thread, other threads:[~2017-09-14  1:13 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2017-09-13  9:20 [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode Huacai Chen
2017-09-13 21:52 ` Andrew Morton
2017-09-14  1:13   ` [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN innon-coherent " 陈华才

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