From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wi0-f175.google.com (mail-wi0-f175.google.com [209.85.212.175]) by kanga.kvack.org (Postfix) with ESMTP id CEE776B0036 for ; Tue, 6 May 2014 18:44:45 -0400 (EDT) Received: by mail-wi0-f175.google.com with SMTP id f8so4357162wiw.8 for ; Tue, 06 May 2014 15:44:45 -0700 (PDT) Received: from mx4-phx2.redhat.com (mx4-phx2.redhat.com. [209.132.183.25]) by mx.google.com with ESMTP id l7si4996351wie.71.2014.05.06.15.44.42 for ; Tue, 06 May 2014 15:44:43 -0700 (PDT) Date: Tue, 6 May 2014 18:44:08 -0400 (EDT) From: David Airlie Message-ID: <1960794033.1414346.1399416248431.JavaMail.zimbra@redhat.com> In-Reply-To: References: <1399038730-25641-1-git-send-email-j.glisse@gmail.com> <20140506150014.GA6731@gmail.com> <20140506153315.GB6731@gmail.com> <53690E29.7060602@redhat.com> Subject: Re: [RFC] Heterogeneous memory management (mirror process address space on a device mmu). MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: owner-linux-mm@kvack.org List-ID: To: Linus Torvalds Cc: Rik van Riel , Jerome Glisse , Peter Zijlstra , linux-mm , Linux Kernel Mailing List , linux-fsdevel , Mel Gorman , "H. Peter Anvin" , Andrew Morton , Linda Wang , Kevin E Martin , Jerome Glisse , Andrea Arcangeli , Johannes Weiner , Larry Woodman , Jeff Law , Brendan Conoboy , Joe Donohue , Duncan Poole , Sherry Cheung , Subhash Gutti , John Hubbard , Mark Hairgrove , Lucien Dunning , Cameron Buschardt , Arvind Gopalakrishnan , Haggai Eran , Or Gerlitz , Sagi Grimberg , Shachar Raindel , Liran Liss , Roland Dreier , Ben Sander , Greg Stoner , John Bridgman , Michael Mantor , Paul Blinzer , Laurent Morichetti , Alexander Deucher , Oded Gabbay , Davidlohr Bueso > > On Tue, May 6, 2014 at 9:30 AM, Rik van Riel wrote: > > > > The GPU runs a lot faster when using video memory, instead > > of system memory, on the other side of the PCIe bus. > > The nineties called, and they want their old broken model back. > > Get with the times. No high-performance future GPU will ever run > behind the PCIe bus. We still have a few straggling historical > artifacts, but everybody knows where the future is headed. > > They are already cache-coherent because flushing caches etc was too > damn expensive. They're getting more so. The future might be closer coupled, but it still might not be cache coherent, it might also just be a faster PCIE, considering the current one is a lot faster than the 90s PCI you talk about. No current high-performance GPU runs in front of the PCIe bus, Intel are still catching up to the performance level of anyone else and others still remain ahead. Even intel make MIC cards for compute that put stuff on the other side of the PCIE divide. Dave. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org