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Shutemov" Cc: "Dave Hansen" , "Peter Zijlstra (Intel)" , "the arch/x86 maintainers" , "kcc@google.com" , "ryabinin.a.a@gmail.com" , "andreyknvl@gmail.com" , "glider@google.com" , "dvyukov@google.com" , "H.J. Lu" , "Andi Kleen" , "Rick P Edgecombe" , linux-mm@kvack.org, "Linux Kernel Mailing List" Subject: Re: [PATCHv3 6/8] x86/mm: Provide ARCH_GET_UNTAG_MASK and ARCH_ENABLE_TAGGED_ADDR Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1656556179; a=rsa-sha256; cv=none; b=x0dnvza+PzqVdQm4P3/B4C+gxIKFnJWdG8dNAw2mSXhSRxslya9mH1T/c5h75uvQTB5RTR grXwyHBkGtUZ1x3aC60yx3+HcNyspEQfoMsWlWXftujiT9kTa0oDDXaKi4i+SCB80aTiXa u/xERHMaHK/1IdztSYpyiQBwkkE0LBs= ARC-Authentication-Results: i=1; imf18.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=rF6Ur1V5; spf=pass (imf18.hostedemail.com: domain of luto@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=luto@kernel.org; dmarc=pass (policy=none) header.from=kernel.org ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1656556179; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=Z/nQ6geEfLy7/fWTAEM1Jz5WuG/7rdmrEE0pSwKBclI=; b=KHoDqInTsRMyHF3L4s0vyAKbXEymLHmY+EOZsvKlVWI2aSzquQxKAueMGyhYQF/fk0781O Emk6T9e2vcGLl+elBuIV5xmHpEKa1Y2bdM0j/yzEBgMnagxSBYXvG2jRxGAZYYxS8gvXvY YW1H1b2dzGiAVjb0CT7Y5SPrqWfffds= X-Rspam-User: X-Rspamd-Server: rspam04 Authentication-Results: imf18.hostedemail.com; dkim=pass header.d=kernel.org header.s=k20201202 header.b=rF6Ur1V5; spf=pass (imf18.hostedemail.com: domain of luto@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=luto@kernel.org; dmarc=pass (policy=none) header.from=kernel.org X-Stat-Signature: pg9tytq4m1x9pt9bjz435rqkpouee8xc X-Rspamd-Queue-Id: 3454A1C0036 X-HE-Tag: 1656556179-278039 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Tue, Jun 28, 2022, at 5:53 PM, Kirill A. Shutemov wrote: > On Tue, Jun 28, 2022 at 04:42:40PM -0700, Andy Lutomirski wrote: >> On 6/10/22 07:35, Kirill A. Shutemov wrote: >>=20 >> > + /* Update CR3 to get LAM active */ >> > + switch_mm(current->mm, current->mm, current); >>=20 >> Can you at least justify this oddity? When changing an LDT, we use a >> dedicated mechanism. Is there a significant benefit to abusing switc= h_mm >> for this? > > I'm not sure I follow. LAM mode is set in CR3. switch_mm() has to hand= le > it anyway to context switch. Why do you consider it abuse? > >>=20 >> Also, why can't we enable LAM on a multithreaded process? We can cha= nge an >> LDT, and the code isn't even particularly complicated. > > I reworked this in v4[1] and it allows multithreaded processes. Have y= ou > got that version? > > Intel had issue with mail server, but I assumed it didn't affect my > patchset since I see it in the archive. > I didn=E2=80=99t notice it. Not quite sure what the issue was. Could jus= t be incompetence on my part. I think that=E2=80=99s the right idea, except that I think you shouldn=E2= =80=99t use switch_mm for this. Just update the LAM bits directly. Onc= e you read mm_cpumask, you should be guaranteed (see next paragraph) tha= t, for each CPU that isn=E2=80=99t in the set, if it switches to the new= mm, it will notice the new LAM. I say =E2=80=9Cshould be=E2=80=9D because I think smp_wmb() is insuffici= ent. You=E2=80=99re ordering a write with a subsequent read, which needs= smp_mb(). > [1]=20 > https://lore.kernel.org/all/20220622162230.83474-1-kirill.shutemov@lin= ux.intel.com/ > > --=20 > Kirill A. Shutemov