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h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=l6m577XdcFp83GD11AjZtBk9/x8HVwX6Ol04tR2Bdgz1+7hCiLXGiRbqT8axEXbFf kE9xwaZFqE+GQKddJq6yGwpqqS2+dXTVbFKMhcxwC5PZRCgArJ1h64IlrNE8PUE91X p06wQOo7mkNU7qeLlwGG1tCmc9n7PCivgQLkKbA0= Message-ID: <2000d7c9-3188-4539-ba9e-654d6460e21d@arm.com> Date: Mon, 1 Jun 2026 16:36:26 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC V2 13/14] arm64/mm: Add an abstraction level for tlbi_op To: Anshuman Khandual , linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Lorenzo Stoakes , Andrew Morton , David Hildenbrand , Mike Rapoport , Linu Cherian , Usama Arif , linux-kernel@vger.kernel.org, linux-mm@kvack.org References: <20260513044547.4128549-1-anshuman.khandual@arm.com> <20260513044547.4128549-14-anshuman.khandual@arm.com> Content-Language: en-US From: Dev Jain In-Reply-To: <20260513044547.4128549-14-anshuman.khandual@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Stat-Signature: 5rr3zjdymz3izymsr5rqyiriwwnqicfy X-Rspamd-Queue-Id: C1EC2A0010 X-Rspamd-Server: rspam07 X-Rspam-User: X-HE-Tag: 1780311994-741318 X-HE-Meta: U2FsdGVkX1/EcNxrvMxyRJ2w612LtQonqBIklR13/OmMwsplx4S3pFpVl6hUh9V3vQU9rKAPhyFryMysUIiqzI4pl9TLHXH9vwT094JtZTsl+R8jm4V/DcDI5TDkaefbkMd6k1Zup05rTfbwrA+i8g5VnaAtduqo4KQ3/+jVRBBBazTLgFucrQqjNgHwUhf7BFeSjvX9Nw2ZtRgyzGBRdAp/mRchENPQ8W1DySzYCNaFgd2q7jkohCevy4a1T4xnGV844JyYp5iuVRDLbufLV4eCImZorg8BxHZe5Ukd2sAatUjMOPAGuk7gkV3XB4Ay+8ul8t9s8oW+HxXsmW5VsYb8Qx4OhmOg2T+TJohfjbJEL/rolb4lNT2pvNRm55NWHCCMtdfE1Je/oiy2X0YXZ4QIJVNN2XbQQ1t1F2ab0WBY3fo+FdeFD0O7mEzv8m3hvFe5vzxksjNjGgXE5FWl6NU1oJ9CBsuUZfhHmkRLjI0TAbNKpOJUMl4kRYjwkbvS6TXtTMmDB27IrKmgR4SXoOKn1p96w9maxPd9IsAcYVhk1bMYW5XX77m+MmEqeW1NnB/T16wT4J2MjAaR5trwTTx/Xnk3QT6dU6VrWygwW3aVsNq280NqYUGvoCL3mM9RoiX7SPpa+DetcMDeGYT/KxV7MV3ujM0/uN7YsknNueml8DrLvgVphigQdK/wGkPoGVK16UAKxQK1sD/WAmB+v/csEZrIaWdHxaLaMSiBJ2fJ5VDtxZsutJ/Z3M7O7dyCAAjXrKWZx4qjBaLTduyO1EwBCxTUv1Zgam1KBXi8u1VCLBXIPKQzny6BgPO/wjmcMdlKyxBiwIXV01AXESc8qt/B+tX7WkiQ3qKhSsxTu2qFn4HEF6Fwfl8T6MnZtucbxFLJITBRM56g8LafIT71SR/D+kSW67y6WCNoav6zl0+fMLU64io3lUvemcPwk97XCAwMmgKwS7AZgJ8VBRE Nh3ublky QPVnIsj2LcI/E8BLFyeQ3RFLtSF2rj9GiLTA5F8XzdeJGu2eZnpyGQ7aU+hQPqS0J4WWEAG43J9JoNiMqj7JrGi+HE/sgib1j2alhHyK6hIZm8/cvA/mpeHQAJI7ZQdg5ZJTAZcZevMXgRfLJgPgbdeL2XoifSA6cVjeif5LrofhfVZ5TdFTR2oKSRDfoYdGGWc9E9Z6mfeYdRFqb1VbrO0uAjNqG1EoXWIVHny6A5/iQwCNzlOYKZBmEEA2baSBp+fJI56t2oJjsPoaosGNrrvaDHv0pvx9k6DZ1KazKBEAn9GlPN/JCqXEZmaz3BJFCy5IASqFmJKnR5Ww6YtRUogzjkA== Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On 13/05/26 10:15 am, Anshuman Khandual wrote: > From: Linu Cherian > > With FEAT_D128, a new instruction aka TLBIP is being introduced for the TLB > range operations which has an argument size of 128 bit. > > Add an abstraction level to void (*tlbi_op)(u64 arg) helpers to support the > D128 variations when applicable. > > No functional changes are introduced with this patch. > > Signed-off-by: Linu Cherian > Signed-off-by: Anshuman Khandual > --- > arch/arm64/include/asm/tlbflush.h | 70 ++++++++++++++++--------------- > 1 file changed, 37 insertions(+), 33 deletions(-) > > diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h > index c0bf5b398041..361d74ef8016 100644 > --- a/arch/arm64/include/asm/tlbflush.h > +++ b/arch/arm64/include/asm/tlbflush.h > @@ -162,49 +162,53 @@ static inline void sme_dvmsync_batch(struct arch_tlbflush_unmap_batch *batch) > > #define TLBI_TTL_UNKNOWN INT_MAX > > -typedef void (*tlbi_op)(u64 arg); > +typedef u64 tlbi_args_t; > +#define __tlbi_wrapper(op, arg) __tlbi(op, arg) > +#define __tlbi_user_wrapper(op, arg) __tlbi_user(op, arg) The suffix "wrapper" sounds weird. How about "emit"? > > -static __always_inline void vae1is(u64 arg) > +typedef void (*tlbi_op)(tlbi_args_t arg); > + > +static __always_inline void vae1is(tlbi_args_t arg) > { > - __tlbi(vae1is, arg); > - __tlbi_user(vae1is, arg); > + __tlbi_wrapper(vae1is, arg); > + __tlbi_user_wrapper(vae1is, arg); > } > > -static __always_inline void vae2is(u64 arg) > +static __always_inline void vae2is(tlbi_args_t arg) > { > - __tlbi(vae2is, arg); > + __tlbi_wrapper(vae2is, arg); > } > > -static __always_inline void vale1(u64 arg) > +static __always_inline void vale1(tlbi_args_t arg) > { > - __tlbi(vale1, arg); > - __tlbi_user(vale1, arg); > + __tlbi_wrapper(vale1, arg); > + __tlbi_user_wrapper(vale1, arg); > } > > -static __always_inline void vale1is(u64 arg) > +static __always_inline void vale1is(tlbi_args_t arg) > { > - __tlbi(vale1is, arg); > - __tlbi_user(vale1is, arg); > + __tlbi_wrapper(vale1is, arg); > + __tlbi_user_wrapper(vale1is, arg); > } > > -static __always_inline void vale2is(u64 arg) > +static __always_inline void vale2is(tlbi_args_t arg) > { > - __tlbi(vale2is, arg); > + __tlbi_wrapper(vale2is, arg); > } > > -static __always_inline void vaale1is(u64 arg) > +static __always_inline void vaale1is(tlbi_args_t arg) > { > - __tlbi(vaale1is, arg); > + __tlbi_wrapper(vaale1is, arg); > } > > -static __always_inline void ipas2e1(u64 arg) > +static __always_inline void ipas2e1(tlbi_args_t arg) > { > - __tlbi(ipas2e1, arg); > + __tlbi_wrapper(ipas2e1, arg); > } > > -static __always_inline void ipas2e1is(u64 arg) > +static __always_inline void ipas2e1is(tlbi_args_t arg) > { > - __tlbi(ipas2e1is, arg); > + __tlbi_wrapper(ipas2e1is, arg); > } > > static __always_inline void __tlbi_level_asid(tlbi_op op, u64 addr, u32 level, > @@ -475,32 +479,32 @@ static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch) > * operations can only span an even number of pages. We save this for last to > * ensure 64KB start alignment is maintained for the LPA2 case. > */ > -static __always_inline void rvae1is(u64 arg) > +static __always_inline void rvae1is(tlbi_args_t arg) > { > - __tlbi(rvae1is, arg); > - __tlbi_user(rvae1is, arg); > + __tlbi_wrapper(rvae1is, arg); > + __tlbi_user_wrapper(rvae1is, arg); > } > > -static __always_inline void rvale1(u64 arg) > +static __always_inline void rvale1(tlbi_args_t arg) > { > - __tlbi(rvale1, arg); > - __tlbi_user(rvale1, arg); > + __tlbi_wrapper(rvale1, arg); > + __tlbi_user_wrapper(rvale1, arg); > } > > -static __always_inline void rvale1is(u64 arg) > +static __always_inline void rvale1is(tlbi_args_t arg) > { > - __tlbi(rvale1is, arg); > - __tlbi_user(rvale1is, arg); > + __tlbi_wrapper(rvale1is, arg); > + __tlbi_user_wrapper(rvale1is, arg); > } > > -static __always_inline void rvaale1is(u64 arg) > +static __always_inline void rvaale1is(tlbi_args_t arg) > { > - __tlbi(rvaale1is, arg); > + __tlbi_wrapper(rvaale1is, arg); > } > > -static __always_inline void ripas2e1is(u64 arg) > +static __always_inline void ripas2e1is(tlbi_args_t arg) > { > - __tlbi(ripas2e1is, arg); > + __tlbi_wrapper(ripas2e1is, arg); > } > > static __always_inline void __tlbi_range(tlbi_op op, u64 addr,