Re: [PATCH] shrink per_cpu_pages to fit 32byte cacheline

Arjan van de Ven
2004-09-14T11:44:12Z

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On Tue, Sep 14, 2004 at 07:01:52AM -0300, Marcelo Tosatti wrote:
> On Tue, Sep 14, 2004 at 01:13:29PM +0200, Arjan van de Ven wrote:
> > On Tue, Sep 14, 2004 at 06:34:07AM -0300, Marcelo Tosatti wrote:
> > > How come short access can cost 1 extra cycle? Because you need two "read bytes" ?
> >
> > on an x86, a word (2byte) access will cause a prefix byte to the
> > instruction, that particular prefix byte will take an extra cycle during execution
> > of the instruction and potentially reduces the parallal decodability of
> > instructions....
>
> OK thanks Arjan, where did you read this? The "Intel IA32 Optimization Guide" ?

some version of that; I can't find it in my current one though. Hrmpf
Maybe there's someone from intel or amd on this list who can confirm the
performance impact of the 0x66 operand size override prefix

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