Re: [PATCH] shrink per_cpu_pages to fit 32byte cacheline

Marcelo Tosatti
2004-09-14T10:01:52Z

On Tue, Sep 14, 2004 at 01:13:29PM +0200, Arjan van de Ven wrote:
> On Tue, Sep 14, 2004 at 06:34:07AM -0300, Marcelo Tosatti wrote:
> > How come short access can cost 1 extra cycle? Because you need two "read bytes" ?
>
> on an x86, a word (2byte) access will cause a prefix byte to the
> instruction, that particular prefix byte will take an extra cycle during execution
> of the instruction and potentially reduces the parallal decodability of
> instructions....

OK thanks Arjan, where did you read this? The "Intel IA32 Optimization Guide" ?

Thanks for the info.

Andrew, we might want to revert the pagevec shrinkage part which changes couple
of variables to short - want to keep the "15" though.