From: Ingo Molnar <mingo@kernel.org>
To: Alex Shi <alex.shi@linaro.org>
Cc: Peter Zijlstra <peterz@infradead.org>,
Mel Gorman <mgorman@suse.de>, H Peter Anvin <hpa@zytor.com>,
Linux-X86 <x86@kernel.org>, Linux-MM <linux-mm@kvack.org>,
LKML <linux-kernel@vger.kernel.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
Thomas Gleixner <tglx@linutronix.de>,
Fengguang Wu <fengguang.wu@intel.com>
Subject: Re: [PATCH 2/3] x86: mm: Change tlb_flushall_shift for IvyBridge
Date: Tue, 17 Dec 2013 14:14:56 +0100 [thread overview]
Message-ID: <20131217131456.GA28688@gmail.com> (raw)
In-Reply-To: <52B03C84.1000600@linaro.org>
* Alex Shi <alex.shi@linaro.org> wrote:
> > Building the kernel is obviously a prime workload - and given that
> > the kernel is active only about 10% of the time for a typical
> > kernel build, a 1-2% speedup means a 10-20% speedup in kernel
> > performance (which sounds a bit too good at first glance).
>
> Maybe a extra time tlb flush causes more tlb refill that cost much
> user space time.
All these things are measurable, that way maybes can be converted into
certainty.
Thanks,
Ingo
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next prev parent reply other threads:[~2013-12-17 13:15 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-12 11:55 [RFC PATCH 0/3] Fix ebizzy performance regression on IvyBridge due to X86 TLB range flush Mel Gorman
2013-12-12 11:55 ` [PATCH 1/3] x86: mm: Clean up inconsistencies when flushing TLB ranges Mel Gorman
2013-12-12 13:59 ` Alex Shi
2013-12-12 23:53 ` Mel Gorman
2013-12-12 11:55 ` [PATCH 2/3] x86: mm: Change tlb_flushall_shift for IvyBridge Mel Gorman
2013-12-12 13:13 ` Ingo Molnar
2013-12-12 13:38 ` Alex Shi
2013-12-12 14:11 ` Ingo Molnar
2013-12-13 1:02 ` Alex Shi
2013-12-13 2:11 ` Alex Shi
2013-12-13 13:43 ` Ingo Molnar
2013-12-14 11:01 ` Alex Shi
2013-12-14 14:19 ` Peter Zijlstra
2013-12-14 14:27 ` Peter Zijlstra
2013-12-16 13:59 ` Ingo Molnar
2013-12-17 11:59 ` Alex Shi
2013-12-17 13:14 ` Ingo Molnar [this message]
2013-12-16 8:26 ` Alex Shi
2013-12-16 10:06 ` Peter Zijlstra
2013-12-12 13:45 ` Alex Shi
2013-12-12 11:55 ` [PATCH 3/3] x86: mm: Account for the of CPUs that must be flushed during a TLB range flush Mel Gorman
2013-12-12 13:41 ` Alex Shi
2013-12-12 13:01 ` [RFC PATCH 0/3] Fix ebizzy performance regression on IvyBridge due to X86 " Ingo Molnar
2013-12-12 14:40 ` Mel Gorman
2013-12-13 13:35 ` Ingo Molnar
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