From: Shaohua Li <shli@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: linux-mm@kvack.org, akpm@linux-foundation.org, mingo@kernel.org,
riel@redhat.com, hughd@google.com, mgorman@suse.de,
torvalds@linux-foundation.org
Subject: [patch]x86: clearing access bit don't flush tlb
Date: Thu, 3 Apr 2014 08:42:50 +0800 [thread overview]
Message-ID: <20140403004250.GA14597@kernel.org> (raw)
Add a few acks and resend this patch.
We use access bit to age a page at page reclaim. When clearing pte access bit,
we could skip tlb flush in X86. The side effect is if the pte is in tlb and pte
access bit is unset in page table, when cpu access the page again, cpu will not
set page table pte's access bit. Next time page reclaim will think this hot
page is yong and reclaim it wrongly, but this doesn't corrupt data.
And according to intel manual, tlb has less than 1k entries, which covers < 4M
memory. In today's system, several giga byte memory is normal. After page
reclaim clears pte access bit and before cpu access the page again, it's quite
unlikely this page's pte is still in TLB. And context swich will flush tlb too.
The chance skiping tlb flush to impact page reclaim should be very rare.
Originally (in 2.5 kernel maybe), we didn't do tlb flush after clear access bit.
Hugh added it to fix some ARM and sparc issues. Since I only change this for
x86, there should be no risk.
And in some workloads, TLB flush overhead is very heavy. In my simple
multithread app with a lot of swap to several pcie SSD, removing the tlb flush
gives about 20% ~ 30% swapout speedup.
Signed-off-by: Shaohua Li <shli@fusionio.com>
Acked-by: Rik van Riel <riel@redhat.com>
Acked-by: Mel Gorman <mgorman@suse.de>
Acked-by: Hugh Dickins <hughd@google.com>
---
arch/x86/mm/pgtable.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
Index: linux/arch/x86/mm/pgtable.c
===================================================================
--- linux.orig/arch/x86/mm/pgtable.c 2014-03-27 05:22:08.572100549 +0800
+++ linux/arch/x86/mm/pgtable.c 2014-03-27 05:46:12.456131121 +0800
@@ -399,13 +399,12 @@ int pmdp_test_and_clear_young(struct vm_
int ptep_clear_flush_young(struct vm_area_struct *vma,
unsigned long address, pte_t *ptep)
{
- int young;
-
- young = ptep_test_and_clear_young(vma, address, ptep);
- if (young)
- flush_tlb_page(vma, address);
-
- return young;
+ /*
+ * In X86, clearing access bit without TLB flush doesn't cause data
+ * corruption. Doing this could cause wrong page aging and so hot pages
+ * are reclaimed, but the chance should be very rare.
+ */
+ return ptep_test_and_clear_young(vma, address, ptep);
}
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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next reply other threads:[~2014-04-03 0:43 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-03 0:42 Shaohua Li [this message]
2014-04-03 11:35 ` [patch] x86: clearing access bit don't flush tlb Ingo Molnar
2014-04-03 13:45 ` Shaohua Li
2014-04-04 15:01 ` Johannes Weiner
2014-04-08 7:58 ` Shaohua Li
2014-04-14 11:36 ` Ingo Molnar
-- strict thread matches above, loose matches on Subject: below --
2014-03-26 22:30 [patch]x86: " Shaohua Li
2014-03-26 23:55 ` Rik van Riel
2014-03-27 17:12 ` Shaohua Li
2014-03-27 18:41 ` Rik van Riel
2014-03-28 19:02 ` Shaohua Li
2014-03-30 12:58 ` Rik van Riel
2014-03-31 2:16 ` Shaohua Li
2014-04-02 13:01 ` Mel Gorman
2014-04-02 15:42 ` Hugh Dickins
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