Re: [PATCH v3 0/3] x86/mm: INVPCID support

[Borislav Petkov <bp@alien8.de>]

On Fri, Jan 29, 2016 at 11:42:56AM -0800, Andy Lutomirski wrote:
> Boris, I think you already have these prerequisites queued up:
> 
> http://lkml.kernel.org/g/1452516679-32040-2-git-send-email-aryabinin@virtuozzo.com
> http://lkml.kernel.org/g/1452516679-32040-3-git-send-email-aryabinin@virtuozzo.com
> 
> This is a straightforward speedup on Ivy Bridge and newer, IIRC.
> (I tested on Skylake.  INVPCID is not available on Sandy Bridge.
> I don't have Ivy Bridge, Haswell or Broadwell to test on, so I
> could be wrong as to when the feature was introduced.)
> 
> I think we should consider these patches separately from the rest
> of the PCID stuff -- they barely interact, and this part is much
> simpler and is useful on its own.
> 
> Changes from v2:
>  - Add macros for the INVPCID mode numbers.
>  - Add a changelog message for the chicken bit.
> 
> v1 was exactly identical to patches 2-4 of the PCID RFC series.
> Andy Lutomirski (3):
>   x86/mm: Add INVPCID helpers
>   x86/mm: Add a noinvpcid option to turn off INVPCID
>   x86/mm: If INVPCID is available, use it to flush global mappings
> 
>  Documentation/kernel-parameters.txt |  2 ++
>  arch/x86/include/asm/tlbflush.h     | 57 +++++++++++++++++++++++++++++++++++++
>  arch/x86/kernel/cpu/common.c        | 16 +++++++++++
>  3 files changed, 75 insertions(+)

All 5 (3 INVPCID + 2 KASAN ones at the URLs above):

Reviewed-by: Borislav Petkov <bp@suse.de>

-- 
Regards/Gruss,
    Boris.

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