From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>
Cc: Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Dan Williams <dan.j.williams@intel.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: [PATCHv6 06/10] x86/mm: Add sync_global_pgds() for configuration with 5-level paging
Date: Wed, 24 May 2017 12:54:15 +0300 [thread overview]
Message-ID: <20170524095419.14281-7-kirill.shutemov@linux.intel.com> (raw)
In-Reply-To: <20170524095419.14281-1-kirill.shutemov@linux.intel.com>
This basically restores slightly modified version of original
sync_global_pgds() which we had before folded p4d was introduced.
The only modification is protection against 'addr' overflow.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
arch/x86/mm/init_64.c | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 95651dc58e09..ce410c05d68d 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -92,6 +92,44 @@ __setup("noexec32=", nonx32_setup);
* When memory was added make sure all the processes MM have
* suitable PGD entries in the local PGD level page.
*/
+#ifdef CONFIG_X86_5LEVEL
+void sync_global_pgds(unsigned long start, unsigned long end)
+{
+ unsigned long addr;
+
+ for (addr = start; addr <= end; addr += ALIGN(addr + 1, PGDIR_SIZE)) {
+ const pgd_t *pgd_ref = pgd_offset_k(addr);
+ struct page *page;
+
+ /* Check for overflow */
+ if (addr < start)
+ break;
+
+ if (pgd_none(*pgd_ref))
+ continue;
+
+ spin_lock(&pgd_lock);
+ list_for_each_entry(page, &pgd_list, lru) {
+ pgd_t *pgd;
+ spinlock_t *pgt_lock;
+
+ pgd = (pgd_t *)page_address(page) + pgd_index(addr);
+ /* the pgt_lock only for Xen */
+ pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
+ spin_lock(pgt_lock);
+
+ if (!pgd_none(*pgd_ref) && !pgd_none(*pgd))
+ BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
+
+ if (pgd_none(*pgd))
+ set_pgd(pgd, *pgd_ref);
+
+ spin_unlock(pgt_lock);
+ }
+ spin_unlock(&pgd_lock);
+ }
+}
+#else
void sync_global_pgds(unsigned long start, unsigned long end)
{
unsigned long addr;
@@ -135,6 +173,7 @@ void sync_global_pgds(unsigned long start, unsigned long end)
spin_unlock(&pgd_lock);
}
}
+#endif
/*
* NOTE: This function is marked __ref because it calls __init function
--
2.11.0
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next prev parent reply other threads:[~2017-05-24 9:54 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-24 9:54 [PATCHv6 00/10] x86: 5-level paging enabling for v4.12, Part 4 Kirill A. Shutemov
2017-05-24 9:54 ` [PATCHv6 01/10] x86/mm/gup: Switch GUP to the generic get_user_page_fast() implementation Kirill A. Shutemov
2017-05-24 9:54 ` [PATCHv6 02/10] x86/asm: Fix comment in return_from_SYSCALL_64 Kirill A. Shutemov
2017-05-24 9:54 ` [PATCHv6 03/10] x86/boot/64: Rewrite startup_64 in C Kirill A. Shutemov
2017-05-24 9:54 ` [PATCHv6 04/10] x86/boot/64: Rename init_level4_pgt and early_level4_pgt Kirill A. Shutemov
2017-05-24 10:05 ` Juergen Gross
2017-05-24 9:54 ` [PATCHv6 05/10] x86/boot/64: Add support of additional page table level during early boot Kirill A. Shutemov
2017-05-24 9:54 ` Kirill A. Shutemov [this message]
2017-06-02 14:50 ` [PATCHv6 06/10] x86/mm: Add sync_global_pgds() for configuration with 5-level paging Andrey Ryabinin
2017-06-02 15:04 ` Kirill A. Shutemov
2017-05-24 9:54 ` [PATCHv6 07/10] x86/mm: Make kernel_physical_mapping_init() support " Kirill A. Shutemov
2017-05-24 9:54 ` [PATCHv6 08/10] x86/mm: Add support for 5-level paging for KASLR Kirill A. Shutemov
2017-05-24 9:54 ` [PATCHv6 09/10] x86: Enable 5-level paging support Kirill A. Shutemov
2017-05-24 10:03 ` Juergen Gross
2017-05-24 9:54 ` [PATCHv6 10/10] x86/mm: Allow to have userspace mappings above 47-bits Kirill A. Shutemov
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