From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>
Cc: Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
linux-arch@vger.kernel.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: [PATCH 5/5] x86/mm: Allow userspace have mapping above 47-bit
Date: Thu, 22 Jun 2017 15:26:08 +0300 [thread overview]
Message-ID: <20170622122608.80435-6-kirill.shutemov@linux.intel.com> (raw)
In-Reply-To: <20170622122608.80435-1-kirill.shutemov@linux.intel.com>
All bits and pieces now in place and we can allow userspace to have VMAs
above 47-bit.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
arch/x86/include/asm/processor.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 42b87689ecd7..0ed01fdd7fa2 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -844,9 +844,9 @@ static inline void spin_lock_prefetch(const void *x)
* particular problem by preventing anything from being mapped
* at the maximum canonical address.
*/
-#define TASK_SIZE_MAX ((1UL << 47) - PAGE_SIZE)
+#define TASK_SIZE_MAX ((1UL << __VIRTUAL_MASK_SHIFT) - PAGE_SIZE)
-#define DEFAULT_MAP_WINDOW TASK_SIZE_MAX
+#define DEFAULT_MAP_WINDOW ((1UL << 47) - PAGE_SIZE)
/* This decides where the kernel will search for a free chunk of vm
* space during mmap's.
--
2.11.0
--
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next prev parent reply other threads:[~2017-06-22 12:26 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-22 12:26 [PATCH 0/5] Last bits for initial 5-level paging enabling Kirill A. Shutemov
2017-06-22 12:26 ` [PATCH 1/5] x86: Enable 5-level paging support Kirill A. Shutemov
2017-06-22 12:26 ` [PATCH 2/5] x86/mm: Rename tasksize_32bit/64bit to task_size_32bit/64bit Kirill A. Shutemov
2017-06-22 12:26 ` [PATCH 3/5] x86/mpx: Do not allow MPX if we have mappings above 47-bit Kirill A. Shutemov
2017-06-22 12:26 ` [PATCH 4/5] x86/mm: Prepare to expose larger address space to userspace Kirill A. Shutemov
2017-06-22 12:26 ` Kirill A. Shutemov [this message]
2017-06-23 9:06 ` [PATCH 0/5] Last bits for initial 5-level paging enabling Ingo Molnar
2017-06-23 14:49 ` Kirill A. Shutemov
2017-06-29 15:06 ` Kirill A. Shutemov
2017-06-30 6:59 ` Ingo Molnar
2017-06-28 12:17 ` [PATCH 6/5] x86/KASLR: Fix detection 32/64 bit bootloaders for 5-level paging Kirill A. Shutemov
2017-06-28 16:39 ` Kees Cook
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