From: Ingo Molnar <mingo@kernel.org>
To: "Kirill A. Shutemov" <kirill@shutemov.name>
Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Michal Hocko <mhocko@kernel.org>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv4 08/14] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable
Date: Thu, 17 Aug 2017 13:10:05 +0200 [thread overview]
Message-ID: <20170817111005.asebivpywpeyevfq@gmail.com> (raw)
In-Reply-To: <20170817105418.gpcxazmpmx4aaxyz@node.shutemov.name>
* Kirill A. Shutemov <kirill@shutemov.name> wrote:
> On Thu, Aug 17, 2017 at 11:00:38AM +0200, Ingo Molnar wrote:
> >
> > * Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:
> >
> > > For boot-time switching between 4- and 5-level paging we need to be able
> > > to fold p4d page table level at runtime. It requires variable
> > > PGDIR_SHIFT and PTRS_PER_P4D.
> > >
> > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> > > ---
> > > arch/x86/boot/compressed/kaslr.c | 5 +++++
> > > arch/x86/include/asm/pgtable_32.h | 2 ++
> > > arch/x86/include/asm/pgtable_32_types.h | 2 ++
> > > arch/x86/include/asm/pgtable_64_types.h | 15 +++++++++++++--
> > > arch/x86/kernel/head64.c | 9 ++++++++-
> > > arch/x86/mm/dump_pagetables.c | 12 +++++-------
> > > arch/x86/mm/init_64.c | 2 +-
> > > arch/x86/mm/kasan_init_64.c | 2 +-
> > > arch/x86/platform/efi/efi_64.c | 4 ++--
> > > include/asm-generic/5level-fixup.h | 1 +
> > > include/asm-generic/pgtable-nop4d.h | 1 +
> > > include/linux/kasan.h | 2 +-
> > > mm/kasan/kasan_init.c | 2 +-
> > > 13 files changed, 43 insertions(+), 16 deletions(-)
> >
> > So I'm wondering what the code generation effect of this is - what's the
> > before/after vmlinux size?
> >
> > My guess is that the effect should be very small, as these constants are not
> > widely used - but I'm only guessing and could be wrong.
>
> This change increase vmlinux size for defconfig + X86_5LEVEL=y by ~4k or
> 0.01%.
Please add this info to one of the changelogs.
BTW., some of that might be won back via the later optimizations, right?
BTW, I think what matters most is the .text section size, while 'size' would also
add exceptions/out-of-line sections too.
Here's a way to display the .text section only:
triton:~/tip> printf "# vmlinux .text size: %d\n" 0x$(echo $(readelf -W -e vmlinux | grep ' \[ 1\] .text ') | cut -d' ' -f7)
# vmlinux .text size: 9797610
triton:~/tip> size vmlinux
text data bss dec hex filename
10748306 4875500 876544 16500350 fbc67e vmlinux
Thanks,
Ingo
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next prev parent reply other threads:[~2017-08-17 11:10 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-08 12:54 [PATCHv4 00/14] Boot-time switching between 4- and 5-level paging Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 01/14] mm/sparsemem: Allocate mem_section at runtime for SPARSEMEM_EXTREME Kirill A. Shutemov
2017-08-14 14:29 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 02/14] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 03/14] x86/kasan: Use the same shadow offset for 4- and 5-level paging Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 04/14] x86/xen: Provide pre-built page tables only for XEN_PV and XEN_PVH Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 05/14] x86/xen: Drop 5-level paging support code from XEN_PV code Kirill A. Shutemov
2017-08-09 11:54 ` Juergen Gross
2017-08-08 12:54 ` [PATCHv4 06/14] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 07/14] x86/mm: Make virtual memory layout movable for CONFIG_X86_5LEVEL Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 08/14] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable Kirill A. Shutemov
2017-08-17 9:00 ` Ingo Molnar
2017-08-17 10:54 ` Kirill A. Shutemov
2017-08-17 11:10 ` Ingo Molnar [this message]
2017-08-21 15:23 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 09/14] x86/mm: Handle boot-time paging mode switching at early boot Kirill A. Shutemov
2017-08-17 9:05 ` Ingo Molnar
2017-08-17 9:10 ` Ingo Molnar
2017-08-08 12:54 ` [PATCHv4 10/14] x86/mm: Fold p4d page table layer at runtime Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 11/14] x86/mm: Replace compile-time checks for 5-level with runtime-time Kirill A. Shutemov
2017-08-17 9:17 ` Ingo Molnar
2017-08-08 12:54 ` [PATCHv4 12/14] x86/mm: Allow to boot without la57 if CONFIG_X86_5LEVEL=y Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 13/14] x86/xen: Allow XEN_PV and XEN_PVH to be enabled with X86_5LEVEL Kirill A. Shutemov
2017-08-09 11:50 ` Juergen Gross
2017-08-08 12:54 ` [PATCHv4 14/14] x86/mm: Offset boot-time paging mode switching cost Kirill A. Shutemov
2017-08-17 9:21 ` Ingo Molnar
2017-08-14 14:30 ` [PATCHv4 00/14] Boot-time switching between 4- and 5-level paging Kirill A. Shutemov
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