From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f71.google.com (mail-wm0-f71.google.com [74.125.82.71]) by kanga.kvack.org (Postfix) with ESMTP id BD9A2800D8 for ; Tue, 23 Jan 2018 09:57:59 -0500 (EST) Received: by mail-wm0-f71.google.com with SMTP id c142so558296wmh.4 for ; Tue, 23 Jan 2018 06:57:59 -0800 (PST) Received: from fuzix.org (www.llwyncelyn.cymru. [82.70.14.225]) by mx.google.com with ESMTPS id 3si6677053wmc.56.2018.01.23.06.57.58 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 23 Jan 2018 06:57:58 -0800 (PST) Date: Tue, 23 Jan 2018 14:57:17 +0000 From: Alan Cox Subject: Re: [RFC PATCH 00/16] PTI support for x86-32 Message-ID: <20180123145717.75c84e9a@alans-desktop> In-Reply-To: <20180122085625.GE28161@8bytes.org> References: <1516120619-1159-1-git-send-email-joro@8bytes.org> <5D89F55C-902A-4464-A64E-7157FF55FAD0@gmail.com> <886C924D-668F-4007-98CA-555DB6279E4F@gmail.com> <9CF1DD34-7C66-4F11-856D-B5E896988E16@gmail.com> <20180122085625.GE28161@8bytes.org> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: owner-linux-mm@kvack.org List-ID: To: Joerg Roedel Cc: Nadav Amit , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , the arch/x86 maintainers , LKML , "open list:MEMORY MANAGEMENT" , Linus Torvalds , Andy Lutomirski , Dave Hansen , Josh Poimboeuf , Juergen Gross , Peter Zijlstra , Borislav Petkov , Jiri Kosina , Boris Ostrovsky , Brian Gerst , David Laight , Denys Vlasenko , Eduardo Valentin , Greg KH , Will Deacon , aliguori@amazon.com, daniel.gruss@iaik.tugraz.at, hughd@google.com, keescook@google.com, Andrea Arcangeli , Waiman Long , jroedel@suse.de On Mon, 22 Jan 2018 09:56:25 +0100 Joerg Roedel wrote: > Hey Nadav, > > On Sun, Jan 21, 2018 at 03:46:24PM -0800, Nadav Amit wrote: > > It does seem that segmentation provides sufficient protection from Meltdown. > > Thanks for testing this, if this turns out to be true for all affected > uarchs it would be a great and better way of protection than enabling > PTI. > > But I'd like an official statement from Intel on that one, as their > recommended fix is still to use PTI. > > And as you said, if it turns out that this works only on some Intel > uarchs, we can also detect it at runtime and then chose the fasted > meltdown protection mechanism. I'll follow this up and get an official statement. Alan -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org