From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt1-f199.google.com (mail-qt1-f199.google.com [209.85.160.199]) by kanga.kvack.org (Postfix) with ESMTP id E0D116B000A for ; Wed, 3 Oct 2018 17:21:28 -0400 (EDT) Received: by mail-qt1-f199.google.com with SMTP id l6-v6so5321842qtc.12 for ; Wed, 03 Oct 2018 14:21:28 -0700 (PDT) Received: from mx1.redhat.com (mx1.redhat.com. [209.132.183.28]) by mx.google.com with ESMTPS id o7-v6si1033543qta.399.2018.10.03.14.21.28 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Oct 2018 14:21:28 -0700 (PDT) Date: Wed, 3 Oct 2018 23:21:44 +0200 From: Eugene Syromiatnikov Subject: Re: [RFC PATCH v4 24/27] mm/mmap: Create a guard area between VMAs Message-ID: <20181003212029.GH32759@asgard.redhat.com> References: <20180921150351.20898-1-yu-cheng.yu@intel.com> <20180921150351.20898-25-yu-cheng.yu@intel.com> <20181003045611.GB22724@asgard.redhat.com> <5ddb0ad33298d1858e530fce9c9ea2788b2fac81.camel@intel.com> <20181003163226.GC9449@asgard.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: owner-linux-mm@kvack.org List-ID: To: Jann Horn Cc: yu-cheng.yu@intel.com, Andy Lutomirski , the arch/x86 maintainers , "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , kernel list , linux-doc@vger.kernel.org, Linux-MM , linux-arch , Linux API , Arnd Bergmann , Balbir Singh , Cyrill Gorcunov , Dave Hansen , Florian Weimer , hjl.tools@gmail.com, Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , rdunlap@infradead.org, ravi.v.shankar@intel.com, vedvyas.shanbhogue@intel.com On Wed, Oct 03, 2018 at 06:52:40PM +0200, Jann Horn wrote: > On Wed, Oct 3, 2018 at 6:32 PM Eugene Syromiatnikov wrote: > > I'm not sure, however, whether such a change that provides no ability > > to configure or affect it will go well with all the supported > > architectures. > > Is there a concrete reason why you think an architecture might not > like this? As far as I can tell, the virtual address space overhead > should be insignificant even for 32-bit systems. Not really, and not architectures per se, but judging by some past experiences with enabling ASLR, I would expect that all kinds of weird applications may start to behave in all kinds of strange ways. Not that I have anything more than this doubt, however; but this sort of change without any ability to tune or revert it still looks unusual to me.