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[40.107.1.62]) by mx.google.com with ESMTPS id s27si673908edd.33.2019.01.30.09.39.09 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 30 Jan 2019 09:39:10 -0800 (PST) Received-SPF: pass (google.com: domain of jgg@mellanox.com designates 40.107.1.62 as permitted sender) client-ip=40.107.1.62; Authentication-Results: mx.google.com; dkim=pass header.i=@Mellanox.com header.s=selector1 header.b=okaDjsxS; spf=pass (google.com: domain of jgg@mellanox.com designates 40.107.1.62 as permitted sender) smtp.mailfrom=jgg@mellanox.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=mellanox.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HFBwZlA2zzCYNeNt7uJfqDsoesFpddqG96hIhNSMGQ4=; b=okaDjsxSpeKecjLldjouoR/XYA+lS0F3IsyaPgqfhWR0PutAUtijM47Z34ep+9gVESHm2ysdfUFhNomf8lVSYbbnOwf7QJiTLJMZwzcstjbqMLJZqt1J7SK+4N9aX5LjwvpWDjE+f73KJZNckCBvNFIclU3/P8cTvgKEL0sU82s= Received: from DBBPR05MB6426.eurprd05.prod.outlook.com (20.179.42.80) by DBBPR05MB6281.eurprd05.prod.outlook.com (20.179.40.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1580.17; Wed, 30 Jan 2019 17:39:07 +0000 Received: from DBBPR05MB6426.eurprd05.prod.outlook.com ([fe80::24c2:321d:8b27:ae59]) by DBBPR05MB6426.eurprd05.prod.outlook.com ([fe80::24c2:321d:8b27:ae59%5]) with mapi id 15.20.1580.017; Wed, 30 Jan 2019 17:39:07 +0000 From: Jason Gunthorpe To: Christoph Hellwig CC: Jerome Glisse , "Koenig, Christian" , Logan Gunthorpe , "linux-mm@kvack.org" , "linux-kernel@vger.kernel.org" , Greg Kroah-Hartman , "Rafael J . Wysocki" , Bjorn Helgaas , "Kuehling, Felix" , "linux-pci@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Marek Szyprowski , Robin Murphy , Joerg Roedel , "iommu@lists.linux-foundation.org" Subject: Re: [RFC PATCH 3/5] mm/vma: add support for peer to peer to device vma Thread-Topic: [RFC PATCH 3/5] mm/vma: add support for peer to peer to device vma Thread-Index: AQHUt/rA/dLikqWEmEaIytHIBNLPlqXGkyOAgAAJwICAAAX+AIAAEreAgAAFNYCAALluAIAAKlaAgABZ/ICAABl4gIAAA2KA Date: Wed, 30 Jan 2019 17:39:07 +0000 Message-ID: <20190130173859.GA17915@mellanox.com> References: <20190129174728.6430-4-jglisse@redhat.com> <20190129191120.GE3176@redhat.com> <20190129193250.GK10108@mellanox.com> <99c228c6-ef96-7594-cb43-78931966c75d@deltatee.com> <20190129205827.GM10108@mellanox.com> <20190130080208.GC29665@lst.de> <4e0637ba-0d7c-66a5-d3de-bc1e7dc7c0ef@amd.com> <20190130155543.GC3177@redhat.com> <20190130172653.GA6707@lst.de> In-Reply-To: <20190130172653.GA6707@lst.de> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MWHPR18CA0047.namprd18.prod.outlook.com (2603:10b6:320:31::33) To DBBPR05MB6426.eurprd05.prod.outlook.com (2603:10a6:10:c9::16) authentication-results: spf=none (sender IP is ) smtp.mailfrom=jgg@mellanox.com; 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charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 249e8713-9439-4f8a-696a-08d686d9d5c9 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Jan 2019 17:39:07.2255 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR05MB6281 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Wed, Jan 30, 2019 at 06:26:53PM +0100, Christoph Hellwig wrote: > On Wed, Jan 30, 2019 at 10:55:43AM -0500, Jerome Glisse wrote: > > Even outside GPU driver, device driver like RDMA just want to share the= ir > > doorbell to other device and they do not want to see those doorbell pag= e > > use in direct I/O or anything similar AFAICT. >=20 > At least Mellanox HCA support and inline data feature where you > can copy data directly into the BAR. For something like a usrspace > NVMe target it might be very useful to do direct I/O straight into > the BAR for that. It doesn't really work like that.=20 The PCI-E TLP sequence to trigger this feature is very precise, and the data requires the right headers/etc. Mixing that with O_DIRECT seems very unlikely. Jason