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[209.85.220.65]) by mx.google.com with SMTPS id r18sor1149115itb.5.2019.03.11.16.10.22 for (Google Transport Security); Mon, 11 Mar 2019 16:10:22 -0700 (PDT) Received-SPF: pass (google.com: domain of yuzhao@google.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=BFCdEpjp; spf=pass (google.com: domain of yuzhao@google.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=yuzhao@google.com; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=JhWeojvwTBz9Aj5xfVVwnx7e9iYd5cVRUTneoT1n0Xc=; b=BFCdEpjpz6/5eZxfAWUzbb7WEdlvYQT0pMsvyKFuhE4KY5Gkq2K/1BymERTER4MfgR 5FjA4AHs6caoW3r0PP/P70NTh7d8LNawALOlZoikT5heWcO3L+sq/NgyykmapadiSY68 y5igodO4a2m54Diz5epJvv2vfS/KOXSY/9tgYMYEvv2uGjOxDkH3bWv6GtbT+KPXCNW9 Gfq1E4YLFi3BBhj/YismuquVQuXKMx8gm5uPl6hxgqmhy2D7QgNy8dyuNAXVRHZNyDTE o3G1G8B9ENnfKwHKMVkWktHtvSj+k6OuQymXB8shWe8/011mt4rQJrSAEv/nlImshexE 2vuw== X-Google-Smtp-Source: APXvYqx9zcbjCN/V0nVy+yl1+y41Oy1hqNkxzFW0Tj557B/z8cz2nER+NmYJRrM/iVJJLRTq7G+jSw== X-Received: by 2002:a24:7f04:: with SMTP id r4mr406191itc.17.1552345822341; Mon, 11 Mar 2019 16:10:22 -0700 (PDT) Received: from google.com ([2620:15c:183:0:a0c3:519e:9276:fc96]) by smtp.gmail.com with ESMTPSA id b202sm357295itb.36.2019.03.11.16.10.21 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 11 Mar 2019 16:10:21 -0700 (PDT) Date: Mon, 11 Mar 2019 17:10:17 -0600 From: Yu Zhao To: Anshuman Khandual Cc: Catalin Marinas , Will Deacon , Mark Rutland , "Aneesh Kumar K . V" , Andrew Morton , Nick Piggin , Peter Zijlstra , Joel Fernandes , "Kirill A . Shutemov" , Ard Biesheuvel , Chintan Pandya , Jun Yao , Laura Abbott , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org Subject: Re: [PATCH v3 3/3] arm64: mm: enable per pmd page table lock Message-ID: <20190311231017.GA207964@google.com> References: <20190218231319.178224-1-yuzhao@google.com> <20190310011906.254635-1-yuzhao@google.com> <20190310011906.254635-3-yuzhao@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, Mar 11, 2019 at 01:58:27PM +0530, Anshuman Khandual wrote: > On 03/10/2019 06:49 AM, Yu Zhao wrote: > > Switch from per mm_struct to per pmd page table lock by enabling > > ARCH_ENABLE_SPLIT_PMD_PTLOCK. This provides better granularity for > > large system. > > > > I'm not sure if there is contention on mm->page_table_lock. Given > > the option comes at no cost (apart from initializing more spin > > locks), why not enable it now. > > > > We only do so when pmd is not folded, so we don't mistakenly call > > pgtable_pmd_page_ctor() on pud or p4d in pgd_pgtable_alloc(). (We > > check shift against PMD_SHIFT, which is same as PUD_SHIFT when pmd > > is folded). > > > > Signed-off-by: Yu Zhao > > --- > > arch/arm64/Kconfig | 3 +++ > > arch/arm64/include/asm/pgalloc.h | 12 +++++++++++- > > arch/arm64/include/asm/tlb.h | 5 ++++- > > 3 files changed, 18 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > > index cfbf307d6dc4..a3b1b789f766 100644 > > --- a/arch/arm64/Kconfig > > +++ b/arch/arm64/Kconfig > > @@ -872,6 +872,9 @@ config ARCH_WANT_HUGE_PMD_SHARE > > config ARCH_HAS_CACHE_LINE_SIZE > > def_bool y > > > > +config ARCH_ENABLE_SPLIT_PMD_PTLOCK > > + def_bool y if PGTABLE_LEVELS > 2 > > + > > config SECCOMP > > bool "Enable seccomp to safely compute untrusted bytecode" > > ---help--- > > diff --git a/arch/arm64/include/asm/pgalloc.h b/arch/arm64/include/asm/pgalloc.h > > index 52fa47c73bf0..dabba4b2c61f 100644 > > --- a/arch/arm64/include/asm/pgalloc.h > > +++ b/arch/arm64/include/asm/pgalloc.h > > @@ -33,12 +33,22 @@ > > > > static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) > > { > > - return (pmd_t *)__get_free_page(PGALLOC_GFP); > > + struct page *page; > > + > > + page = alloc_page(PGALLOC_GFP); > > + if (!page) > > + return NULL; > > + if (!pgtable_pmd_page_ctor(page)) { > > + __free_page(page); > > + return NULL; > > + } > > + return page_address(page); > > } > > > > static inline void pmd_free(struct mm_struct *mm, pmd_t *pmdp) > > { > > BUG_ON((unsigned long)pmdp & (PAGE_SIZE-1)); > > + pgtable_pmd_page_dtor(virt_to_page(pmdp)); > > free_page((unsigned long)pmdp); > > } > > There is just one problem here. ARM KVM's stage2_pmd_free() calls into pmd_free() on a page > originally allocated with __get_free_page() and never went through pgtable_pmd_page_ctor(). > So when ARCH_ENABLE_SPLIT_PMD_PTLOCK is enabled > > stage2_pmd_free() > pgtable_pmd_page_dtor() > ptlock_free() > kmem_cache_free(page_ptl_cachep, page->ptl) > > Though SLUB implementation for kmem_cache_free() seems to be handling NULL page->ptl (as the > page never got it's lock allocated or initialized) correctly I am not sure if it is a right > thing to do. Thanks for reminding me. This should be fixed as well. Will do it in a separate patch.