[hnaz-linux-mm:master 82/248] arch/powerpc/mm/nohash/tlb.c:409:6: warning: no previous prototype for 'tlb_flush_pgtable'

[kernel test robot <lkp@intel.com>]

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tree:   https://github.com/hnaz/linux-mm master
head:   7ffdd789c7f570af323ad890ab09118af2e3b0d9
commit: 9939c9934d2e30d1a3b3f7d85572ce3d5f2b0c90 [82/248] mm: remove unneeded includes of <asm/pgalloc.h>
config: powerpc-randconfig-r032-20200708 (attached as .config)
compiler: powerpc64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout 9939c9934d2e30d1a3b3f7d85572ce3d5f2b0c90
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=powerpc 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> arch/powerpc/mm/nohash/tlb.c:409:6: warning: no previous prototype for 'tlb_flush_pgtable' [-Wmissing-prototypes]
     409 | void tlb_flush_pgtable(struct mmu_gather *tlb, unsigned long address)
         |      ^~~~~~~~~~~~~~~~~

vim +/tlb_flush_pgtable +409 arch/powerpc/mm/nohash/tlb.c

25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  404  
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  405  /*
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  406   * Handling of virtual linear page tables or indirect TLB entries
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  407   * flushing when PTE pages are freed
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  408   */
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23 @409  void tlb_flush_pgtable(struct mmu_gather *tlb, unsigned long address)
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  410  {
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  411  	int tsize = mmu_psize_defs[mmu_pte_psize].enc;
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  412  
28efc35fe68dac arch/powerpc/mm/tlb_nohash.c Scott Wood             2013-10-11  413  	if (book3e_htw_mode != PPC_HTW_NONE) {
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  414  		unsigned long start = address & PMD_MASK;
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  415  		unsigned long end = address + PMD_SIZE;
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  416  		unsigned long size = 1UL << mmu_psize_defs[mmu_pte_psize].shift;
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  417  
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  418  		/* This isn't the most optimal, ideally we would factor out the
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  419  		 * while preempt & CPU mask mucking around, or even the IPI but
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  420  		 * it will do for now
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  421  		 */
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  422  		while (start < end) {
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  423  			__flush_tlb_page(tlb->mm, start, tsize, 1);
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  424  			start += size;
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  425  		}
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  426  	} else {
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  427  		unsigned long rmask = 0xf000000000000000ul;
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  428  		unsigned long rid = (address & rmask) | 0x1000000000000000ul;
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  429  		unsigned long vpte = address & ~rmask;
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  430  
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  431  		vpte = (vpte >> (PAGE_SHIFT - 3)) & ~0xffful;
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  432  		vpte |= rid;
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  433  		__flush_tlb_page(tlb->mm, vpte, tsize, 0);
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  434  	}
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  435  }
25d21ad6e799cc arch/powerpc/mm/tlb_nohash.c Benjamin Herrenschmidt 2009-07-23  436  

:::::: The code at line 409 was first introduced by commit
:::::: 25d21ad6e799cccd097b9df2a2fefe19a7e1dfcf powerpc: Add TLB management code for 64-bit Book3E

:::::: TO: Benjamin Herrenschmidt <benh@kernel.crashing.org>
:::::: CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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