From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC2A1C43464 for ; Fri, 18 Sep 2020 19:23:34 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 9FEA022208 for ; Fri, 18 Sep 2020 19:23:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9FEA022208 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id E57D66B0055; Fri, 18 Sep 2020 15:23:33 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id E2D366B005C; Fri, 18 Sep 2020 15:23:33 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id CCD976B00A7; Fri, 18 Sep 2020 15:23:33 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0108.hostedemail.com [216.40.44.108]) by kanga.kvack.org (Postfix) with ESMTP id AF5B26B0055 for ; Fri, 18 Sep 2020 15:23:33 -0400 (EDT) Received: from smtpin04.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay01.hostedemail.com (Postfix) with ESMTP id 6C933180AD806 for ; Fri, 18 Sep 2020 19:23:33 +0000 (UTC) X-FDA: 77277156306.04.smile54_45138dc2712d Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin04.hostedemail.com (Postfix) with ESMTP id 4D3A28004CEF for ; Fri, 18 Sep 2020 19:23:33 +0000 (UTC) X-HE-Tag: smile54_45138dc2712d X-Filterd-Recvd-Size: 5472 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by imf13.hostedemail.com (Postfix) with ESMTP for ; Fri, 18 Sep 2020 19:23:32 +0000 (UTC) IronPort-SDR: qge/eUm3ZPH06xE0Rl25+yAeWvDF/3cvNiXKqVF7n+JK1YFP5jrS2WGAnQRtauhVod2H5O5nvN jeGfvXIAZ4wA== X-IronPort-AV: E=McAfee;i="6000,8403,9748"; a="140018638" X-IronPort-AV: E=Sophos;i="5.77,274,1596524400"; d="scan'208";a="140018638" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2020 12:23:29 -0700 IronPort-SDR: XsNO0oebdTQkduw3KW4XOpVL+NuA4JYBaO/lSIYe9e001NPL/zAInmhxiFphah1bnn33+oFMUI Cpf/kF3Gdk4Q== X-IronPort-AV: E=Sophos;i="5.77,274,1596524400"; d="scan'208";a="484332763" Received: from yyu32-desk.sc.intel.com ([143.183.136.146]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2020 12:23:29 -0700 From: Yu-cheng Yu To: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang Cc: Yu-cheng Yu Subject: [PATCH v12 3/8] x86/cet/ibt: Handle signals for Indirect Branch Tracking Date: Fri, 18 Sep 2020 12:23:07 -0700 Message-Id: <20200918192312.25978-4-yu-cheng.yu@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20200918192312.25978-1-yu-cheng.yu@intel.com> References: <20200918192312.25978-1-yu-cheng.yu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: An indirect CALL/JMP moves the indirect branch tracking (IBT) state machi= ne to WAIT_ENDBR status until the instruction reaches an ENDBR opcode. If t= he CALL/JMP does not reach an ENDBR opcode, the processor raises a control- protection fault. WAIT_ENDBR status can be read from MSR_IA32_U_CET. WAIT_ENDBR is cleared for signal handling, and restored for sigreturn. IBT state machine is described in Intel SDM Vol. 1, Sec. 18.3. Signed-off-by: Yu-cheng Yu --- v9: - Fix missing WAIT_ENDBR in signal handling. arch/x86/kernel/cet.c | 27 +++++++++++++++++++++++++-- arch/x86/kernel/fpu/signal.c | 8 +++++--- 2 files changed, 30 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/cet.c b/arch/x86/kernel/cet.c index e95fadb264f7..1f8b72269166 100644 --- a/arch/x86/kernel/cet.c +++ b/arch/x86/kernel/cet.c @@ -295,6 +295,13 @@ void cet_restore_signal(struct sc_ext *sc_ext) msr_val |=3D CET_SHSTK_EN; } =20 + if (cet->ibt_enabled) { + msr_val |=3D (CET_ENDBR_EN | CET_NO_TRACK_EN); + + if (sc_ext->wait_endbr) + msr_val |=3D CET_WAIT_ENDBR; + } + if (test_thread_flag(TIF_NEED_FPU_LOAD)) cet_user_state->user_cet =3D msr_val; else @@ -335,9 +342,25 @@ int cet_setup_signal(bool ia32, unsigned long rstor_= addr, struct sc_ext *sc_ext) sc_ext->ssp =3D new_ssp; } =20 - if (ssp) { + if (ssp || cet->ibt_enabled) { + start_update_msrs(); - wrmsrl(MSR_IA32_PL3_SSP, ssp); + + if (ssp) + wrmsrl(MSR_IA32_PL3_SSP, ssp); + + if (cet->ibt_enabled) { + u64 r; + + rdmsrl(MSR_IA32_U_CET, r); + + if (r & CET_WAIT_ENDBR) { + sc_ext->wait_endbr =3D 1; + r &=3D ~CET_WAIT_ENDBR; + wrmsrl(MSR_IA32_U_CET, r); + } + } + end_update_msrs(); } =20 diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c index d02ea8c11128..a4d66fa69c1c 100644 --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -57,7 +57,8 @@ int save_cet_to_sigframe(int ia32, void __user *fp, uns= igned long restorer) { int err =3D 0; =20 - if (!current->thread.cet.shstk_size) + if (!current->thread.cet.shstk_size && + !current->thread.cet.ibt_enabled) return 0; =20 if (fp) { @@ -89,7 +90,8 @@ static int get_cet_from_sigframe(int ia32, void __user = *fp, struct sc_ext *ext) =20 memset(ext, 0, sizeof(*ext)); =20 - if (!current->thread.cet.shstk_size) + if (!current->thread.cet.shstk_size && + !current->thread.cet.ibt_enabled) return 0; =20 if (fp) { @@ -577,7 +579,7 @@ static unsigned long fpu__alloc_sigcontext_ext(unsign= ed long sp) * sigcontext_ext is at: fpu + fpu_user_xstate_size + * FP_XSTATE_MAGIC2_SIZE, then aligned to 8. */ - if (cet->shstk_size) + if (cet->shstk_size || cet->ibt_enabled) sp -=3D (sizeof(struct sc_ext) + 8); =20 return sp; --=20 2.21.0