From: Peter Zijlstra <peterz@infradead.org>
To: x86@kernel.org, willy@infradead.org
Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org,
aarcange@redhat.com, kirill.shutemov@linux.intel.com,
jroedel@suse.de, peterz@infradead.org
Subject: [RFC][PATCH 1/9] mm: Update ptep_get_lockless()s comment
Date: Mon, 30 Nov 2020 12:27:06 +0100 [thread overview]
Message-ID: <20201130113602.841001656@infradead.org> (raw)
In-Reply-To: 20201130112705.900705277@infradead.org
Improve the comment and add a lockdep assertion because nobody reads
comments.
Suggested-by: Matthew Wilcox <willy@infradead.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
include/linux/pgtable.h | 17 ++++++++---------
1 file changed, 8 insertions(+), 9 deletions(-)
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -260,15 +260,12 @@ static inline pte_t ptep_get(pte_t *ptep
#ifdef CONFIG_GUP_GET_PTE_LOW_HIGH
/*
- * WARNING: only to be used in the get_user_pages_fast() implementation.
- *
- * With get_user_pages_fast(), we walk down the pagetables without taking any
- * locks. For this we would like to load the pointers atomically, but sometimes
- * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What
- * we do have is the guarantee that a PTE will only either go from not present
- * to present, or present to not present or both -- it will not switch to a
- * completely different present page without a TLB flush in between; something
- * that we are blocking by holding interrupts off.
+ * For walking the pagetables without holding any locks. Some architectures
+ * (eg x86-32 PAE) cannot load the entries atomically without using expensive
+ * instructions. We are guaranteed that a PTE will only either go from not
+ * present to present, or present to not present -- it will not switch to a
+ * completely different present page without a TLB flush inbetween; which we
+ * are blocking by holding interrupts off.
*
* Setting ptes from not present to present goes:
*
@@ -294,6 +291,8 @@ static inline pte_t ptep_get_lockless(pt
{
pte_t pte;
+ lockdep_assert_irqs_disabled();
+
do {
pte.pte_low = ptep->pte_low;
smp_rmb();
next prev parent reply other threads:[~2020-11-30 11:38 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-30 11:27 [RFC][PATCH 0/9] Clean up i386-PAE Peter Zijlstra
2020-11-30 11:27 ` Peter Zijlstra [this message]
2020-11-30 11:27 ` [RFC][PATCH 2/9] x86/mm/pae: Make pmd_t similar to pte_t Peter Zijlstra
2020-11-30 11:27 ` [RFC][PATCH 3/9] sh/mm: " Peter Zijlstra
2020-11-30 14:10 ` David Laight
2020-11-30 14:21 ` Peter Zijlstra
2020-11-30 11:27 ` [RFC][PATCH 4/9] mm: Fix pmd_read_atomic() Peter Zijlstra
2020-11-30 11:27 ` [RFC][PATCH 5/9] mm: Rename pmd_read_atomic() Peter Zijlstra
2020-11-30 15:31 ` Jason Gunthorpe
2020-12-01 8:57 ` Peter Zijlstra
2020-11-30 11:27 ` [RFC][PATCH 6/9] mm/gup: Fix the lockless walkers Peter Zijlstra
2020-11-30 11:27 ` [RFC][PATCH 7/9] x86/mm/pae: Dont (ab)use atomic64 Peter Zijlstra
2020-11-30 11:27 ` [RFC][PATCH 8/9] x86/mm/pae: Use WRITE_ONCE() Peter Zijlstra
2020-11-30 11:27 ` [RFC][PATCH 9/9] x86/mm/pae: Be consistent with pXXp_get_and_clear() Peter Zijlstra
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